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2020 – today
- 2024
[j4]Chen-Chia Chang
, Jingyu Pan, Zhiyao Xie, Tunhou Zhang, Jiang Hu, Yiran Chen:
Toward Fully Automated Machine Learning for Routability Estimator Development. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 43(3): 970-982 (2024)- [c9]Chen-Chia Chang, Yikang Shen, Shaoze Fan, Jing Li, Shun Zhang, Ningyuan Cao, Yiran Chen, Xin Zhang:
LaMAGIC: Language-Model-based Topology Generation for Analog Integrated Circuits. ICML 2024 - [i6]Chen-Chia Chang, Yikang Shan, Shaoze Fan, Jing Li, Shun Zhang, Ningyuan Cao, Yiran Chen, Xin Zhang:
LaMAGIC: Language-Model-based Topology Generation for Analog Integrated Circuits. CoRR abs/2407.18269 (2024) - 2023
- [j3]Zhiyao Xie, Jingyu Pan, Chen-Chia Chang, Jiang Hu, Yiran Chen:
The Dark Side: Security and Reliability Concerns in Machine Learning for EDA. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 42(4): 1171-1184 (2023) - [c8]Chen-Chia Chang, Jingyu Pan, Zhiyao Xie, Yaguang Li, Yishuang Lin, Jiang Hu, Yiran Chen:
Fully Automated Machine Learning Model Development for Analog Placement Quality Prediction. ASP-DAC 2023: 58-63 - [c7]Chen-Chia Chang, Jingyu Pan, Zhiyao Xie, Jiang Hu, Yiran Chen:
Rethink before Releasing Your Model: ML Model Extraction Attack in EDA. ASP-DAC 2023: 252-257 - [c6]Qijun Zhang, Shiyu Li, Guanglei Zhou, Jingyu Pan, Chen-Chia Chang, Yiran Chen, Zhiyao Xie:
PANDA: Architecture-Level Power Evaluation by Unifying Analytical and Machine Learning Solutions. ICCAD 2023: 1-9 - [i5]Jingyu Pan, Chen-Chia Chang, Zhiyao Xie, Yiran Chen:
EDALearn: A Comprehensive RTL-to-Signoff EDA Benchmark for Democratized and Reproducible ML for EDA Research. CoRR abs/2312.01674 (2023) - [i4]Qijun Zhang, Shiyu Li, Guanglei Zhou, Jingyu Pan, Chen-Chia Chang, Yiran Chen, Zhiyao Xie:
PANDA: Architecture-Level Power Evaluation by Unifying Analytical and Machine Learning Solutions. CoRR abs/2312.08994 (2023) - 2022
- [j2]Zhiyao Xie, Rongjian Liang, Xiaoqing Xu, Jiang Hu, Chen-Chia Chang, Jingyu Pan, Yiran Chen:
Preplacement Net Length and Timing Estimation by Customized Graph Neural Network. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 41(11): 4667-4680 (2022) - [c5]Jingyu Pan, Chen-Chia Chang, Zhiyao Xie, Ang Li, Minxue Tang, Tunhou Zhang, Jiang Hu, Yiran Chen:
Towards collaborative intelligence: routability estimation based on decentralized private data. DAC 2022: 961-966 - [c4]Zhiyao Xie, Shiyu Li, Mingyuan Ma, Chen-Chia Chang, Jingyu Pan, Yiran Chen, Jiang Hu:
DEEP: Developing Extremely Efficient Runtime On-Chip Power Meters. ICCAD 2022: 76:1-76:9 - [c3]Jingyu Pan, Chen-Chia Chang, Zhiyao Xie, Jiang Hu, Yiran Chen:
Robustify ML-Based Lithography Hotspot Detectors. ICCAD 2022: 134:1-134:7 - [i3]Zhiyao Xie, Jingyu Pan, Chen-Chia Chang, Yiran Chen:
The Dark Side: Security Concerns in Machine Learning for EDA. CoRR abs/2203.10597 (2022) - [i2]Jingyu Pan, Chen-Chia Chang, Zhiyao Xie, Ang Li, Minxue Tang, Tunhou Zhang, Jiang Hu, Yiran Chen:
Towards Collaborative Intelligence: Routability Estimation based on Decentralized Private Data. CoRR abs/2203.16009 (2022) - 2021
- [c2]Chen-Chia Chang, Jingyu Pan, Tunhou Zhang, Zhiyao Xie, Jiang Hu, Weiyi Qi, Chung-Wei Lin, Rongjian Liang, Joydeep Mitra, Elias Fallon, Yiran Chen:
Automatic Routability Predictor Development Using Neural Architecture Search. ICCAD 2021: 1-9 - [c1]Wei-Kai Liu, Ming-Hung Chen, Chia-Ming Chang, Chen-Chia Chang, Yao-Wen Chang:
Time-Division Multiplexing Based System-Level FPGA Routing. ICCAD 2021: 1-6 - 2020
- [i1]Jingyu Pan, Chen-Chia Chang, Tunhou Zhang, Zhiyao Xie, Jiang Hu, Weiyi Qi, Chung-Wei Lin, Rongjian Liang, Joydeep Mitra, Elias Fallon, Yiran Chen:
Automatic Routability Predictor Development Using Neural Architecture Search. CoRR abs/2012.01737 (2020)
2010 – 2019
- 2018
- [j1]Yi-Wei Ma, Jiann-Liang Chen, Chen-Chia Chang, Akihiro Nakao, Shu Yamamoto:
A novel dynamic resource adjustment architecture for virtual tenant networks in SDN. J. Syst. Softw. 143: 100-115 (2018)
Coauthor Index
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