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2020 – today
- 2022
[i7]Tom Vander Aa
, Tom Haber, Thomas J. Ashby, Roel Wuyts, Wilfried Verachtert:
Virtual Screening on FPGA: Performance and Energy versus Effort. CoRR abs/2210.10386 (2022)- 2021
- [c38]Imen Chakroun, Tom Vander Aa, Roel Wuyts, Wilfried Verachtert:
Distributing intelligence for object detection using edge computing. CLOUD 2021: 681-687 - [c37]Imen Chakroun, Tom Vander Aa, Roel Wuyts, Wilfried Verarcht:
Privacy-Preserving Multi-Party Machine Learning for Object Detection. GCAIoT 2021: 7-13 - 2020
- [j11]Noé Sturm, Andreas Mayr, Thanh Le Van, Vladimir I. Chupakhin, Hugo Ceulemans, Jörg K. Wegner, José Felipe Golib Dzib, Nina Jeliazkova, Yves Vandriessche, Stanislav Böhm, Vojtech Cima, Jan Martinovic, Nigel Greene, Tom Vander Aa, Thomas J. Ashby, Sepp Hochreiter, Ola Engkvist, Günter Klambauer, Hongming Chen:
Industry-scale application and evaluation of deep learning for drug target prediction. J. Cheminformatics 12(1): 26 (2020) - [c36]Tom Vander Aa, Xiangju Qin, Paul Blomstedt, Roel Wuyts, Wilfried Verachtert, Samuel Kaski:
A High-Performance Implementation of Bayesian Matrix Factorization with Limited Communication. ICCS (6) 2020: 3-16 - [i6]Imen Chakroun, Tom Vander Aa, Thomas J. Ashby:
Guidelines for enhancing data locality in selected machine learning algorithms. CoRR abs/2001.03000 (2020) - [i5]Tom Vander Aa, Xiangju Qin, Paul Blomstedt, Roel Wuyts, Wilfried Verachtert, Samuel Kaski:
A High-Performance Implementation of Bayesian Matrix Factorization with Limited Communication. CoRR abs/2004.02561 (2020)
2010 – 2019
- 2019
- [j10]Imen Chakroun, Tom Vander Aa, Tom Ashby:
Guidelines for enhancing data locality in selected machine learning algorithms. Intell. Data Anal. 23(5): 1003-1020 (2019) - [c35]Tom Vander Aa, Imen Chakroun, Thomas J. Ashby:
SMURFF: a High-Performance Framework for Matrix Factorization. AICAS 2019: 304-308 - [c34]Tom Vander Aa, Tom Ashby, Roel Wuyts:
Virtual Screening on FPGA. BNAIC/BENELEARN 2019 - [c33]Tom Vander Aa, Imen Chakroun, Tom Ashby, Jaak Simm, Adam Arany, Yves Moreau, Thanh Le Van, José Felipe Golib Dzib, Jörg K. Wegner, Vladimir I. Chupakhin, Hugo Ceulemans, Roel Wuyts, Wilfried Verachtert:
SMURFF: A High-Performance Framework for Matrix Factorization Methods. BNAIC/BENELEARN 2019 - [i4]Tom Vander Aa, Imen Chakroun, Thomas J. Ashby:
SMURFF: a High-Performance Framework for Matrix Factorization. CoRR abs/1904.02514 (2019) - [i3]Imen Chakroun, Tom Vander Aa, Tom Ashby:
Reviewing Data Access Patterns and Computational Redundancy for Machine Learning Algorithms. CoRR abs/1904.11203 (2019) - 2018
- [j9]Imen Chakroun, Tom Vander Aa, Bruno De Fraine, Tom Haber, Pascal Costanza, Roel Wuyts:
A high-level library for multidimensional arrays programming in computational science. Concurr. Comput. Pract. Exp. 30(7) (2018) - [c32]Imen Chakroun, Tom Vander Aa, Thomas J. Ashby:
Cache-efficient Gradient Descent Algorithm. ESANN 2018 - [c31]Vojtech Cima, Stanislav Böhm, Jan Martinovic, Jiri Dvorský, Katerina Janurová, Tom Vander Aa, Thomas J. Ashby, Vladimir I. Chupakhin:
HyperLoom: A Platform for Defining and Executing Scientific Pipelines in Distributed Environments. PARMA-DITAM@HiPEAC 2018: 1-6 - [c30]Imen Chakroun, Tom Vander Aa, Tom Ashby:
Enhancing Machine Learning Optimization Algorithms by Leveraging Memory Caching (Research Poster). HPCS 2018: 1066-1067 - 2017
- [c29]Tom Vander Aa, Imen Chakroun, Tom Haber:
Distributed Bayesian Probabilistic Matrix Factorization. ICCS 2017: 1030-1039 - [i2]Tom Vander Aa, Imen Chakroun, Tom Haber:
Distributed Bayesian Probabilistic Matrix Factorization. CoRR abs/1705.04159 (2017) - [i1]Tom Vander Aa, Imen Chakroun, Tom Haber:
Distributed Matrix Factorization using Asynchrounous Communication. CoRR abs/1705.10633 (2017) - 2016
- [c28]Tom Vander Aa, Imen Chakroun, Tom Haber:
Distributed Bayesian Probabilistic Matrix Factorization. CLUSTER 2016: 346-349 - [c27]Estefania Serrano, Tom Vander Aa, Roel Wuyts, Francisco Javier García Blas, Jesús Carretero, Mónica Abella:
Exploring a Distributed Iterative Reconstructor Based on Split Bregman Using PETSc. ICA3PP Workshops 2016: 191-200 - [c26]Imen Chakroun, Tom Haber, Tom Vander Aa, Thomas Kovac:
Exploring Parallel Implementations of the Bayesian Probabilistic Matrix Factorization. PDP 2016: 119-126 - 2015
- [j8]Namita Sharma, Preeti Ranjan Panda, Francky Catthoor, Praveen Raghavan, Tom Vander Aa:
Array Interleaving - An Energy-Efficient Data Layout Transformation. ACM Trans. Design Autom. Electr. Syst. 20(3): 44:1-44:26 (2015) - [c25]Imen Chakroun, Tom Vander Aa, Bruno De Fraine, Tom Haber, Roel Wuyts, Wolfgang De Meuter:
ExaShark: a scalable hybrid array kit for exascale simulation. SpringSim (HPS) 2015: 41-48 - 2014
- [c24]Wim Meeus, Tom Vander Aa, Praveen Raghavan, Dirk Stroobandt:
Hard versus Soft Software Defined Radio. VLSID 2014: 276-281 - [e1]Florian Brandner, Tom Vander Aa:
Proceedings of the 11th Workshop on Optimizations for DSP and Embedded Systems, ODES@CGO 2014, Orlando, Florida, USA, February 15, 2014. ACM 2014, ISBN 978-1-4503-2595-0 [contents] - 2013
- [c23]Namita Sharma, Tom Vander Aa, Prashant Agrawal, Praveen Raghavan, Preeti Ranjan Panda, Francky Catthoor:
Data memory optimization in LTE downlink. ICASSP 2013: 2610-2614 - 2012
- [j7]Martin Palkovic, Peter Debacker, Prabhat Avasare, Steven Dupont, Tom Vander Aa:
Power Estimation at Different Abstraction Levels for Wireless Baseband Processors. J. Low Power Electron. 8(5): 726-738 (2012) - [c22]Tom Vander Aa, Panagiotis Theocharis:
Hands-on tutorial: coarse-grained reconfigurable architectures - compilation and exploration. CODES+ISSS 2012: 575-576 - 2011
- [j6]Tomoya Suzuki, Hideki Yamada, Toshiyuki Yamagishi, Daisuke Takeda, Koji Horisaki, Tom Vander Aa, Toshio Fujisawa, Liesbet Van der Perre, Yasuo Unekawa:
High-Throughput, Low-Power Software-Defined Radio Using Reconfigurable Processors. IEEE Micro 31(6): 19-28 (2011) - [c21]Hideki Yamada, Toshiyuki Yamagishi, Tomoya Suzuki, Kuniaki Ito, Koji Horisaki, Tom Vander Aa, Toshio Fujisawa, Liesbet Van der Perre, Yasuo Unekawa:
A multimodal wireless baseband core using a coarse-grained dynamic reconfigurable processor. COOL Chips 2011: 1-3 - [c20]Tom Vander Aa, Martin Palkovic, Matthias Hartmann, Praveen Raghavan, Antoine Dejonghe, Liesbet Van der Perre:
A multi-threaded coarse-grained array processor for wireless baseband. SASP 2011: 102-107 - [c19]Prashant Agrawal, Robert Fasthuber, Praveen Raghavan, Tom Vander Aa, Ubaid Ahmad, Liesbet Van der Perre, Francky Catthoor:
High level analysis of trade-offs across different partitioning schemes for wireless applications. SiPS 2011: 156-162 - 2010
- [j5]Matthias Hartmann, Vasileios (Vassilis) Pantazis, Tom Vander Aa, Mladen Berekovic, Christian Hochberger:
Still Image Processing on Coarse-Grained Reconfigurable Array Architectures. J. Signal Process. Syst. 60(2): 225-237 (2010) - [j4]Bjorn De Sutter, Osman Allam, Praveen Raghavan, Roeland Vandebriel, Hans Cappelle, Tom Vander Aa, Bingfeng Mei:
An Efficient Memory Organization for High-ILP Inner Modem Baseband SDR Processors. J. Signal Process. Syst. 61(2): 157-179 (2010) - [c18]Tom Vander Aa, Praveen Raghavan, Scott A. Mahlke, Bjorn De Sutter, Aviral Shrivastava, Frank Hannig:
Compilation techniques for CGRAs: exploring all parallelization approaches. CODES+ISSS 2010: 185-186 - [c17]Oscar Gustafsson, Kiarash Amiri, Dennis Andersson, Anton Blad, Christian Bonnet, Joseph R. Cavallaro, Jeroen Declerck, Antoine Dejonghe, Patrik Eliardsson, Miguel Glassee, Aawatif Hayar, Lieven Hollevoet, Christopher Hunter, Madhura Joshi, Florian Kaltenberger, Raymond Knopp, Khanh Le, Zoran Miljanic, Patrick Murphy, Frederik Naessens, Navid Nikaein, Dominique Nussbaum, Renaud Pacalet, Praveen Raghavan, Ashutosh Sabharwal, Onkar Sarode, Predrag Spasojevic, Yang Sun, Hugo M. Tullberg, Tom Vander Aa, Liesbet Van der Perre, Michelle Wetterwald, Michael Wu:
Architectures for cognitive radio testbeds and demonstrators - An overview. CrownCom 2010: 1-6 - [c16]Jeroen Declerck, Praveen Raghavan, Frederik Naessens, Tom Vander Aa, Lieven Hollevoet, Antoine Dejonghe, Liesbet Van der Perre:
SDR platform for 802.11n and 3-GPP LTE. ICSAMOS 2010: 318-323
2000 – 2009
- 2008
- [j3]Bingfeng Mei, Bjorn De Sutter, Tom Vander Aa, M. Wouters, Andreas Kanstein, Steven Dupont:
Implementation of a Coarse-Grained Reconfigurable Media Processor for AVC Decoder. J. Signal Process. Syst. 51(3): 225-243 (2008) - [c15]Andres Garcia, Mladen Berekovic, Tom Vander Aa:
Mapping of the AES cryptographic algorithm on a Coarse-Grain reconfigurable array processor. ASAP 2008: 245-250 - [c14]Bjorn De Sutter, Paul Coene, Tom Vander Aa, Bingfeng Mei:
Placement-and-routing-based register allocation for coarse-grained reconfigurable arrays. LCTES 2008: 151-160 - [c13]Mladen Berekovic, Frank Bouwens, Tom Vander Aa, Diederik Verkest:
Interconnect Power Analysis for a Coarse-Grained Reconfigurable Array Processor. PATMOS 2008: 449-457 - 2007
- [c12]Tom Vander Aa, Bingfeng Mei, Bjorn De Sutter:
A backtracking instruction scheduler using predicate-based code hoisting to fill delay slots. CASES 2007: 229-237 - [c11]Matthias Hartmann, Vasileios (Vassilis) Pantazis, Tom Vander Aa, Mladen Berekovic, Christian Hochberger, Bjorn De Sutter:
Still Image Processing on Coarse-Grained Reconfigurable Array Architectures. ESTIMedia 2007: 67-72 - 2006
- [c10]Bjorn De Sutter, Bingfeng Mei, T. Andrei Bartic, Tom Vander Aa, Mladen Berekovic, Jean-Yves Mignolet, Kris Croes, Paul Coene, Miro Cupac, Aïssa Couvreur, Andy Folens, Steven Dupont, Bert Van Thielen, Andreas Kanstein, Hong-Seok Kim, Sukjin Kim:
Hardware and a Tool Chain for ADRES. ARC 2006: 425-430 - [c9]Tom Vander Aa, Murali Jayapala, Henk Corporaal, Francky Catthoor, Geert Deconinck:
Instruction Transfer And Storage Exploration for Low Energy VLIWs. SiPS 2006: 292-297 - 2005
- [j2]Tom Vander Aa, Murali Jayapala, Francisco Barat, Geert Deconinck, Rudy Lauwereins, Henk Corporaal, Francky Catthoor:
Instruction buffering exploration for low energy embedded processors. J. Embed. Comput. 1(3): 341-351 (2005) - [j1]Murali Jayapala, Francisco Barat, Tom Vander Aa, Francky Catthoor, Henk Corporaal, Geert Deconinck:
Clustered Loop Buffer Organization for Low Energy VLIW Embedded Processors. IEEE Trans. Computers 54(6): 672-683 (2005) - [c8]Andy Lambrechts, Praveen Raghavan, Anthony Leroy, Guillermo Talavera, Tom Vander Aa, Murali Jayapala, Francky Catthoor, Diederik Verkest, Geert Deconinck, Henk Corporaal, Frédéric Robert, Jordi Carrabina:
Power Breakdown Analysis for a Heterogeneous NoC Platform Running a Video Application. ASAP 2005: 179-184 - [c7]Tom Vander Aa, Francky Catthoor, Henk Corporaal, Geert Deconinck:
Combining Data and Instruction Memory Energy Optimizations for Embedded Applications. ESTIMedia 2005: 121-126 - 2004
- [c6]Tom Vander Aa, Murali Jayapala, Francisco Barat, Geert Deconinck, Rudy Lauwereins, Francky Catthoor, Henk Corporaal:
Instruction buffering exploration for low energy VLIWs with instruction clusters. ASP-DAC 2004: 824-829 - [c5]Murali Jayapala, Tom Vander Aa, Francisco Barat, Francky Catthoor, Henk Corporaal, Geert Deconinck:
L0 Cluster Synthesis and Operation Shuffling. PATMOS 2004: 311-321 - [c4]Andy Lambrechts, Tom Vander Aa, Murali Jayapala, Guillermo Talavera, Anthony Leroy, Adelina Shickova, Francisco Barat, Bingfeng Mei, Francky Catthoor, Diederik Verkest, Geert Deconinck, Henk Corporaal, Frédéric Robert, Jordi Carrabina Bordoll:
Design Style Case Study for Embedded Multi Media Compute Nodes. RTSS 2004: 104-113 - [c3]Murali Jayapala, Tom Vander Aa, Francisco Barat, Geert Deconinck, Francky Catthoor, Henk Corporaal:
L0 buffer energy optimization through scheduling and exploration. SAC 2004: 905-906 - 2003
- [c2]Francisco Barat, Murali Jayapala, Tom Vander Aa, Rudy Lauwereins, Geert Deconinck, Henk Corporaal:
Low Power Coarse-Grained Reconfigurable Instruction Set Processor. FPL 2003: 230-239 - [c1]Tom Vander Aa, Murali Jayapala, Francisco Barat, Geert Deconinck, Rudy Lauwereins, Henk Corporaal, Francky Catthoor:
Instruction Buffering Exploration for Low Energy Embedded Processors. PATMOS 2003: 409-419
Coauthor Index
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