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ORCIDHideki Yamada
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2010 – 2019
- 2018
[j4]Shusuke Kawai
, Rui Ito, Kengo Nakata, Yutaka Shimizu, Motoki Nagata, Tomohiko Takeuchi, Hiroyuki Kobayashi, Katsuyuki Ikeuchi, Takayuki Kato, Yosuke Hagiwara, Yuki Fujimura, Kentaro Yoshioka, Shigehito Saigusa, Hiroshi Yoshida, Makoto Arai, Toshiyuki Yamagishi, Hirotsugu Kajihara, Kazuhisa Horiuchi, Hideki Yamada, Tomoya Suzuki, Yuki Ando, Kensuke Nakanishi, Koichiro Ban, Masahiro Sekiya, Yoshimasa Egashira, Tsuguhide Aoki, Kohei Onizuka, Toshiya Mitomo:
An 802.11ax 4 × 4 High-Efficiency WLAN AP Transceiver SoC Supporting 1024-QAM With Frequency-Dependent IQ Calibration and Integrated Interference Analyzer. IEEE J. Solid State Circuits 53(12): 3688-3699 (2018)- [c12]Shusuke Kawai, Hiromitsu Aoyama, Rui Ito, Yutaka Shimizu, Mitsuyuki Ashida, Asuka Maki, Tomohiko Takeuchi, Hiroyuki Kobayashi, Go Urakawa, Hiroaki Hoshino, Shigehito Saigusa, Kazushi Koyama, Makoto Morita, Ryuichi Nihei, Daisuke Goto, Motoki Nagata, Kengo Nakata, Katsuyuki Ikeuchi, Kentaro Yoshioka, Ryoichi Tachibana, Makoto Arai, Chen Kong Teh, Atsushi Suzuki, Hiroshi Yoshida, Yosuke Hagiwara, Takayuki Kato, Ichiro Seto, Tomoya Horiguchi, Koichiro Ban, Kyosuke Takahashi, Hirotsugu Kajihara, Toshiyuki Yamagishi, Yuki Fujimura, Kazuhisa Horiuchi, Katsuya Nonin, Kengo Kurose, Hideki Yamada, Kentaro Taniguchi, Masahiro Sekiya, Takeshi Tomizawa, Daisuke Taki, Masaaki Ikuta, Tomoya Suzuki, Yuki Ando, Daisuke Yashima, Takahisa Kaihotsu, Hiroki Mori, Kensuke Nakanishi, Takeshi Kumagaya, Yasuo Unekawa, Tsuguhide Aoki, Kohei Onizuka, Toshiya Mitomo:
An 802.11ax 4×4 spectrum-efficient WLAN AP transceiver SoC supporting 1024QAM with frequency-dependent IQ calibration and integrated interference analyzer. ISSCC 2018: 442-444 - 2014
- [j3]Nobuaki Kubo, Hideki Yamada, Tomoji Takasu:
Initial Assessment of Medium-Baseline Single-Epoch RTK Using GPS/BeiDou/QZSS. IEICE Trans. Commun. 97-B(6): 1195-1204 (2014) - 2011
- [j2]Tomoya Suzuki, Hideki Yamada, Toshiyuki Yamagishi, Daisuke Takeda, Koji Horisaki, Tom Vander Aa, Toshio Fujisawa, Liesbet Van der Perre, Yasuo Unekawa:
High-Throughput, Low-Power Software-Defined Radio Using Reconfigurable Processors. IEEE Micro 31(6): 19-28 (2011) - [c11]Hideki Yamada, Toshiyuki Yamagishi, Tomoya Suzuki, Kuniaki Ito, Koji Horisaki, Tom Vander Aa, Toshio Fujisawa, Liesbet Van der Perre, Yasuo Unekawa:
A multimodal wireless baseband core using a coarse-grained dynamic reconfigurable processor. COOL Chips 2011: 1-3 - 2010
- [j1]Hideki Yamada, Yui Ogawa, Tomonori Ooya, Tomoya Ishimori, Yasunori Osana, Masato Yoshimi, Yuri Nishikawa, Akira Funahashi, Noriko Hiroi, Hideharu Amano, Yuichiro Shibata, Kiyoshi Oguri:
Automatic Pipeline Construction Focused on Similarity of Rate Law Functions for an FPGA-based Biochemical Simulator. IPSJ Trans. Syst. LSI Des. Methodol. 3: 244-256 (2010)
2000 – 2009
- 2009
- [c10]Tomoya Ishimori, Hideki Yamada, Yuichiro Shibata, Yasunori Osana, Masato Yoshimi, Yuri Nishikawa, Hideharu Amano, Akira Funahashi, Noriko Hiroi, Kiyoshi Oguri:
Pipeline Scheduling with Input Port Constraints for an FPGA-Based Biochemical Simulator. ARC 2009: 368-373 - [c9]Tomonori Ooya, Hideki Yamada, Tomoya Ishimori, Yuichiro Shibata, Yasunori Osana, Kiyoshi Oguri, Masato Yoshimi, Yuri Nishikawa, Akira Funahashi, Noriko Hiroi, Hideharu Amano:
Configuring area and performance: Empirical evaluation on an FPGA-based biochemical simulator. FPL 2009: 679-682 - [c8]Hideki Yamada, Yasunori Osana, Tomoya Ishimori, Tomonori Ooya, Masato Yoshimi, Yuri Nishikawa, Akira Funahashi, Noriko Hiroi, Hideharu Amano, Yuichiro Shibata, Kiyoshi Oguri:
A Modular Approach to Heterogeneous Biochemical Model Simulation on an FPGA. ReConFig 2009: 125-130 - 2008
- [c7]Masato Yoshimi, Yuri Nishikawa, Yasunori Osana, Akira Funahashi, Yuichiro Shibata, Hideki Yamada, Noriko Hiroi, Hiroaki Kitano, Hideharu Amano:
Practical implementation of a network-based stochastic biochemical simulation system on an FPGA. FPL 2008: 663-666 - [c6]Shintaro Mizuno, Takahiro Haruyama, Hideki Yamada, Tsuyoshi Abe, Masahisa Kawashima, Osamu Mizuno:
Adopting IPsec to SIP Network for On-Demand VPN Establishment between Home Networks. GLOBECOM 2008: 5672-5676 - 2007
- [c5]Masakazu Suzuki, Yuki Hiyama, Hideki Yamada:
An efficient solution for compositional design problems by Multi-stage Genetic Algorithm. ISIC 2007: 626-633 - [c4]Masato Yoshimi, Yow Iwaoka, Yuri Nishikawa, Toshinori Kojima, Yasunori Osana, Akira Funahashi, Noriko Hiroi, Yuichiro Shibata, Naoki Iwanaga, Hideki Yamada, Hiroaki Kitano, Hideharu Amano:
FPGA Implementation of a Data-Driven Stochastic Biochemical Simulator with the Next Reaction Method. FPL 2007: 254-259 - [c3]Hideki Yamada, Naoki Iwanaga, Yuichiro Shibata, Yasunori Osana, Masato Yoshimi, Yow Iwaoka, Yuri Nishikawa, Toshinori Kojima, Hideharu Amano, Akira Funahashi, Noriko Hiroi, Hiroaki Kitano, Kiyoshi Oguri:
A Combining technique of rate law functions for a cost-effective reconfigurable biological simulator. FPL 2007: 808-811 - [c2]Masato Yoshimi, Yuri Nishikawa, Toshinori Kojima, Yasunori Osana, Akira Funahashi, Noriko Hiroi, Yuichiro Shibata, Hideki Yamada, Hiroaki Kitano, Hideharu Amano:
A Framework for Implementing a Network-Based Stochastic Biochemical Simulator on an FPGA. FPT 2007: 193-200
1980 – 1989
- 1988
- [c1]Nobuyuki Yagi, Ryoichi Yajima, Kazumasa Enami, Shigemi Mikami, Nobuyuki Sasaki, Kouji Hoshino, Kazuhiro Harukawa, Hideki Yamada:
Chip Set for Real-Time Video Signal Processing. MVA 1988: 237-240
Coauthor Index
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