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ORCIDIEEE Transactions on Circuits and Systems I: Regular Papers, Volume 72
Volume 72, Number 1, January 2025
- José M. de la Rosa:
Guest Editorial A New Exciting Year Ahead for TCAS-I. 1 - Sahibia Kaur Vohra
, Mahendra Sakare, Alex Pappachen James, Devarshi Mrinal Das:
SpiMAM: CMOS Implementation of Bio-Inspired Spiking Multidirectional Associative Memory Featuring In-Situ Learning. 2-13 - Jafar Shamsi, Wilten Nicola:
Implementation of Linear Differential Equations Using Pulse-Coupled Oscillators With an Ultra-Low Power Neuromorphic Realization. 14-24 - Keonhee Park, Hoichang Jeong, Seungbin Kim, Jeongmin Shin, Minseo Kim, Kyuho Jason Lee:
A 701.7 TOPS/W Compute-in-Memory Processor With Time-Domain Computing for Spiking Neural Network. 25-35 - Rubén Gómez-Merchán, Juan Antonio Leñero-Bardallo, Rafael de la Rosa-Vidal, Ángel Rodríguez-Vázquez:
Dynamic Vision With Single Photon Detectors: A Discrete DVS Architecture Using Asynchronous Sensor Front-Ends. 36-49 - Chenggong Wan, Yi Zhu, Yingjie Ma, Xue Li, Lixia Zheng, Jin Wu, Weifeng Sun:
A SPAD Image Sensor With Main-Sub-TDC-Based Coincidence Detection. 50-60 - Aasish Boora, Bharatha Kumar Thangarasu, Kiat Seng Yeo:
A dB-Linear Programmable Gain Amplifier With Mixed-Signal Control for Wide-Gain Range and Low-Power Applications. 61-70 - Ahmed Abdelaal, Michael Pietzko, John G. Kauffman, Ankesh Jain, Maurits Ortmanns:
ΔΣ Modulators Employing MASH DSM DAC-Based Dual Quantization. 71-84 - Guoxiao Cheng, Jin-Dong Zhang, Qiaoyu Chen, Wen Wu:
Analysis and Design of Wideband Active Single-Sideband Time Modulator in 0.13- μm CMOS. 85-98 - Xiaojie Zhang, Kuisong Wang, Ruiying Gao, Yuying Zhang, Jing Wan, Zhiyong Zhou, Xuming Sun, Xiaoxin Liang:
A 4-22 GHz Ultra-Wideband Low-Noise Amplifier With 0.8-1.5 dB NF and 28-31 dB Gain Enhanced by the Negative Load Impedance. 99-110 - Jingyuan Zhang, Weichen Zhao, Baoguo Yang, Xu Yan, Yongxin Guo:
Design and Analysis of a Coupled-Line-Based Load-Modulated Balanced Amplifier MMIC With Enhanced Bandwidth Performance. 111-124 - Hui-Yang Li, Jin-Xu Xu, Xiu Yin Zhang:
Compact On-Chip mm-wave Reconfigurable Wideband Filtering Switch in 28-nm Bulk CMOS for Integrated Sensing and Communication System Applications. 125-134 - Fanfan Meng, Siang-Yun Lee, Odysseas Zografos, Mohit Gupta, Van D. Nguyen, Giovanni De Micheli, Sorin Cotofana, Inge Asselberghs, Christoph Adelmann, Gouri Sankar Kar, Sebastien Couet, Florin Ciubotaru:
Benchmarking of Scaled Majority-Logic-Synthesized Spintronic Circuits Based on Magnetic Tunnel Junction Transducers. 135-142 - Bai Hua Zeng, Wing Shing Chan, Shao Yong Zheng, Xinyu Zhou, Shichang Chen:
An Efficient Asymmetric Outphasing Power Amplifier With Extended Back-Off Range for 5G Applications. 143-154 - Long Wang, Jixin Chen, Zhe Chen, Xiaoyue Xia, Yun Hu, Sidou Zheng, Zekun Li, Rui Zhou, Peigen Zhou, Jianyi Zhou, Wei Hong:
A 24-29.5-GHz Scalable 2 × 2 I-Q TX/RX Chipset With Streamlined IF Interfaces for DBF Systems. 155-168 - Mohammad Mudakir Fazili, Sayeed Ahmad, Belal Iqbal:
A Half-Schmitt Trigger-Based 9T1R Nonvolatile Robust SRAM Cell for Instant On-Off Application. 169-179 - Brunno Alves de Abreu, Guilherme Paim, Lilas Alrahis, Paulo F. Flores, Ozgur Sinanoglu, Sergio Bampi, Hussam Amrouch:
On the Efficacy and Vulnerabilities of Logic Locking in Tree-Based Machine Learning. 180-191 - Jiaxin Yang, Ziyang Guo, Shixuan Wang, Jilong Liu, Yue Zhang, Weisheng Zhao, Lang Zeng, Deming Zhang:
A High-Speed, Low-Power, High-Reliability and Fully Single Event Double Node Upset Tolerant Design for Magnetic Random Access Memory. 192-202 - Mario Garrido, Víctor Manuel Bautista, Alejandro Portas, Javier Hormigo:
Advanced Quantization Schemes to Increase Accuracy, Reduce Area, and Lower Power Consumption in FFT Architectures. 203-213 - Xu Zhang, Yaodong Wei, Minghao Li, Jing Tian, Zhongfeng Wang:
HRCIM-NTT: An Efficient Compute-in-Memory NTT Accelerator With Hybrid-Redundant Numbers. 214-227 - Esfandiar Esmaieli, Yasser Sedaghat, Ali Peiravi:
Fanout-Based Reliability Model for SER Estimation in Combinational Circuits. 228-240 - Majed Alsharari, Son T. Mai, Roger F. Woods, Carlos Reaño:
Efficient Integer-Only-Inference of Gradient Boosting Decision Trees on Low-Power Devices. 241-253 - Wenhao Liu, Kehui Sun, Huihai Wang, Binglun Li, Yongjiu Chen:
Inverse Proportional Chaotification Model for Image Encryption in IoT Scenarios. 254-264 - Haotian Liu, Xicheng Lu, Xiaoyu Yu, Kai Li, Kaiyuan Yang, Haihang Xia, Sizhao Li, Tiantai Deng:
A 3-D Multi-Precision Scalable Systolic FMA Architecture. 265-276 - Luis E. Rueda G., Ricardo Vergel, Edward Silva, Elkim Roa:
A-Connect: An Ex Situ Training Methodology to Mitigate Stochasticity in Neural Network Analog Accelerators. 277-290 - Yongxin Li, Chunbiao Li, Qianyuan Tang, Yikai Gao, Tengfei Lei:
Various Dynamics of Amplitude Regulation Within a Class of 3D Rulkov Neurons. 291-299 - Quanli Deng, Chunhua Wang, Yichuang Sun, Zekun Deng, Gang Yang:
Memristive Tabu Learning Neuron Generated Multi-Wing Attractor With FPGA Implementation and Application in Encryption. 300-311 - Meixuan Jade Li, Chi K. Tse, Ming Yi:
Interdependence Among Voltage-Unstable Buses During Cascading Failure in Power Systems. 312-322 - Zhongyun Hua, Zihua Wu, Yinxing Zhang, Han Bao, Yicong Zhou:
Two-Dimensional Cyclic Chaotic System for Noise-Reduced OFDM-DCSK Communication. 323-336 - Xingxin Wang, Wei Hu, Shibo Tang, Xinxin Wang, Huisi Zhou:
An Automated Fault Attack Framework for Block Ciphers Through Property Mining and Verification. 337-350 - Joschua Conrad, Simon Wilhelmstätter, Rohan Asthana, Vasileios Belagiannis, Maurits Ortmanns:
Differentiable Cost Model for Neural-Network Accelerator Regarding Memory Hierarchy. 351-364 - Philex Ming-Yan Fan, Ming-Xun Wang, Wei-Ting Lin, Yao-Chia Liu:
A 36-Gb/s 1.6-pJ/b PAM-3 Transmitter Leveraging Digital Logic Cells and 4-Tap FFE in 22-nm CMOS. 365-373 - Hui-Ping Yin, Haipeng Ren:
NOMA System Performance Improvement Using Chaos and Deep Learning. 374-382 - Wei Chen, Yajie Li, Dake Liu:
High-Throughput LDPC Decoder for Multiple Wireless Standards. 383-396 - Peng Cao, Yingjie Wang, Jiawei Xu, Zhiliang Hong:
A 55nA Quiescent Current Power-Wise Buck Converter With 1μA-600mA Load Range and 0.5V-1.8V Flexible Output Voltage Options. 397-407 - Khanh Hieu Nguyen, Sung Hyun Kim:
Saturated Sampled-Data Control of DAB DC-DC Converters via LPV Approach With Consideration of Mismatched Time-Varying Parameters. 408-419 - Tz-Wun Wang, Sheng-Hsi Hung, Si-Yi Li, Chi-Yu Chen, Po-Jui Chiu, Tzu-Ying Wu, Ke-Horng Chen, Kuo-Lin Zheng, Ying-Hsi Lin, Shian-Ru Lin, Tsung-Yen Tsai:
Monolithic GaN-Based Multiple-Phase Bidirectional Energy Transfer With Seamless Control Applied on High-Voltage and Low-Voltage Batteries. 420-432 - Houxuan Liu, Liangzong He, Bing Cheng:
Powerless Fractional-Order Tuning Wireless Power Transfer System With Zero Phase Angle Input. 433-442 - Loganathan Ponnarasi, P. B. Pankajavalli, Yongdo Lim, Rathinasamy Sakthivel:
Secure State Estimation-Based Stabilization of IoT-Enabled Wireless Power Transfer Systems. 443-452 - Fan Guo, Shashank Alevoor, Rakshit Dambe Nayak, John Pigott, Ryan Goodfellow, Bertan Bakkaloglu:
A Buck Converter Using Auxiliary-Stage With Multiple-Single-Cycle Non-Linear Control (MSCNLC) for Fast Load Transient Response. 453-466 - Kai Wang, Feiyang Zhong, Jian Song, Zichuan Yu, Lu Tang, Xusheng Tang, Qing Yao:
Power System Frequency Estimation With Zero Response Time Under Abrupt Transients. 467-480
Volume 72, Number 2, February 2025
- Xinmiao Zhang, Chongyan Gu, Mengmei Ye, Qiang Liu, Reza Azarderakhsh, Weiqiang Liu, Yang Li:
Guest Editorial Special Issue on Emerging Hardware Security and Trust Technologies - AsianHOST 2023. 482 - Riccardo Della Sala, Davide Bellizia, Francesco Centurelli, Giuseppe Scotti, Alessandro Trifiletti:
Exploiting Body-Driven Feedbacks in Physical Unclonable Functions for Ultra Low Voltage, Ultra Low Power Applications: A 0.3 V Weak-PUF. 483-496 - Raphaële Milan, Lilian Bossuet, Loïc Lagadec, Carlos Andres Lara-Nino, Brice Colombier, Théotime Bollengier:
Efficient Adaptive Multi-Level Privilege Partitioning With RTrustSoC. 497-509 - Ya Gao, Qizhi Zhang, Xintong Song, Haocheng Ma, Jiaji He, Yiqiang Zhao:
EO-Shield: A Shield-Based Protection Scheme Against Both Invasive and Non-Invasive Attacks. 510-520 - Massimo Vatalaro, Raffaele De Rose, Vincenzo Maccaronio, Marco Lanuzza, Felice Crupi:
Highly Stable PUFs Based on Stacked Voltage Divider for Near-Zero BER Native Sensitivity to Voltage Variations. 521-534 - Janusz Rajski, Maciej Trawka, Jerzy Tyszer, Bartosz Wlodarczak:
A Nonlinear Stream Cipher for Encryption of Test Patterns in Streaming Scan Networks. 535-547 - Matthias Probst, Manuel Brosch, Georg Sigl:
Side-Channel Analysis of Integrate-and-Fire Neurons Within Spiking Neural Networks. 548-560 - Fanny Spagnolo, Massimo Vatalaro, Stefania Perri, Felice Crupi, Pasquale Corsonello:
C4TERO: Configurable Cascaded Carry Chains for High Reliability TERO PUFs on FPGAs. 561-572 - Yao Wang, Guangyang Zhang, Xue Mei, Chongyan Gu:
A High-Reliability, Non-CRP-Discard Arbiter PUF Based on Delay Difference Quantization. 573-585 - Sneha Agarwal, Keshav Goel, Mitali Sinha, Sidhartha Sankar Rout, Sujay Deb:
Detection and Localization of Hardware-Assisted Intermittent Power Attacks in Mixed-Critical Systems. 586-599 - Monalisa Das, Babita Jajodia:
Area and Delay Trade-Offs in Three-Way Toom-Cook Large Integer Multipliers Implemented on FPGAs. 600-609 - Trong-Hung Nguyen, Duc-Thuan Dam, Phuc-Phan Duong, Binh Kieu-Do-Nguyen, Cong-Kha Pham, Trong-Thuc Hoang:
Efficient Hardware Implementation of the Lightweight CRYSTALS-Kyber. 610-622 - Weimin Fu, Shijie Li, Yifang Zhao, Kaichen Yang, Xuan Zhang, Yier Jin, Xiaolong Guo:
A Generalize Hardware Debugging Approach for Large Language Models Semi-Synthetic, Datasets. 623-636 - Nico Mexis, Nikolaos Athanasios Anagnostopoulos, Stefan Katzenbeisser, Elif Bilge Kavun, Sara Tehranipoor, Tolga Arul:
Achieving Error-Free Lightweight Authentication With DRAM-Based Physical Unclonable Functions. 637-646 - Yan Xu, Lin Ding, Penggao He, Zhaojun Lu, Jiliang Zhang:
Meta: A Memory-Efficient Tri-Stage Polynomial Multiplication Accelerator Using 2D Coupled-BFUs. 647-660 - F. de Los Santos-Prieto, F. J. Rubio-Barbero, Rafael Castro-López, Elisenda Roca, Francisco V. Fernández:
A Comprehensive Approach to Improving the Thermal Reliability of RTN-Based PUFs. 661-670 - Lilian Bossuet, Carlos Andres Lara-Nino:
Power and Frequency Intrinsic Channels on gem5. 671-684 - Philex Ming-Yan Fan, Chen-An Chen, Chih-Hao Wang, Hsiang-Yu Ko:
A 1.1 V-Programmable Metal-Fuse Technology With Current-Mode Programming and Program-Guarantee Technique in 28 nm CMOS Technology. 685-693 - Brendan Saux, Jonas Borgmans, Johan Raman, Pieter Rombouts:
A 3.5 GS/s 1-1 MASH VCO ADC With Second-Order Noise Shaping. 694-707 - Xu Wang, Michael Peter Kennedy:
Method to Determine Quantization-Related Parameters of the Digital-to-Time Converter in a Fractional-N Frequency Synthesizer. 708-718 - Bomin Joo, Minkyu Ko, Jieun Kim, Bai-Sun Kong:
A Bio-Inspired Energy- and Area-Efficient Sound Localization Neural Network. 719-729 - Xinchi Xu, Yonggang Wang, Yonghang Zhou, Zhengqi Song, Bo Wu, Xin Lin:
A 12 ps Precision Two-Step Time-to-Digital Converter Consuming 434 μW at 1 MS/s in 180 nm CMOS With a Dual-Slope Time Amplifier. 730-740 - Xiaowei Wang, Zhiqun Li, Zhennan Li, Yan Yao, Hongwei Guo, Dong Chen, Zhiying Xia, Jiancong Du:
A 2-6 GHz Reconfigurable High Dynamic Range Receiver With Wideband Variable Gain LNA. 741-752 - Lucas Nyssens, M. Nabet, Martin Rack, Youssef Bendou, Sidina Wane, Jacques Sombrin, Jean-Pierre Raskin, Dimitri Lederer:
Analysis of Back-Gate Bias Control on EVM Measurements of a Dual-Band Power Amplifier in 22 nm FD-SOI for 5G 28 and 39 GHz Applications. 753-762 - Yo-Sheng Lin, Chung-Ta Huang:
Design and Analysis of Divide-by-4 Injection-Locked Frequency Divider Using Gain-Boosting Injection Balun and Dual Linear Mixer Techniques. 763-775 - Dixian Zhao, Weihan Gao, Keqin Li, Hengzhi Wan, Qin Tian, Yongran Yi, Jiajun Zhang, Huiqi Liu:
Q/V-Band CMOS Beamforming ICs and Integrated Phased-Array Antennas. 776-789 - Gianluca Leone, Matteo Antonio Scrugli, Lorenzo Badas, Luca Martis, Luigi Raffo, Paolo Meloni:
SYNtzulu: A Tiny RISC-V-Controlled SNN Processor for Real-Time Sensor Data Analysis on Low-Power FPGAs. 790-801 - Hao Zhou, Changxu Liu, Lan Yang, Li Shang, Fan Yang:
ReZK: A Highly Reconfigurable Accelerator for Zero-Knowledge Proof. 802-815 - Yishuo Meng, Junfeng Wu, Siwei Xiang, Jianfei Wang, Jia Hou, Zhijie Lin, Chen Yang:
A High-Throughput and Flexible CNN Accelerator Based on Mixed-Radix FFT Method. 816-829 - Svein Anders Tunheim, Lei Jiao, Rishad A. Shafik, Alex Yakovlev, Ole-Christoffer Granmo:
Tsetlin Machine-Based Image Classification FPGA Accelerator With On-Device Training. 830-843 - Sohrab Majidifar, Mohsen Hayati, Saeed Haghiri:
Exploring Hybrid FitzHugh-Rinzel (FHR) Neuron Model Behavior: Cost-Effective FPGA Implementation for High-Frequency and High-Precision Matching by Electromagnetic Flux Effects. 844-853 - Anupam Kumari, Roy Paily Palathinkal:
Design and Analysis of Energy Efficient Approximate Multipliers for Image Processing and Deep Neural Network. 854-867 - Dedong Zhao, Oliver Schrape, Zoran Stamenkovic, Milos Krstic:
ImSTDP: Implicit Timing On-Chip STDP Learning. 868-881 - Gennaro Di Meo, Antonio Giuseppe Maria Strollo, Davide De Caro, Luca Tegazzini, Ettore Napoli:
Low-Power High Precision Floating-Point Divider With Bidimensional Linear Approximation. 882-895 - Fuhong Min, Sipeng Yin, Yizi Cheng:
Hybrid-Diode-Based Shinriki Circuit: Coexisting Oscillations and Bifurcation Trees. 896-906 - Junwei Sun, Yuhan Cao, Yi Yue, Shiping Wen, Yanfeng Wang:
Memristor-Based Parallel Computing Circuit Optimization for LSTM Network Fault Diagnosis. 907-917 - Yongxin Li, Chunbiao Li, Sen Zhang, Yuanjin Zheng, Guanrong Chen:
Offset Boosting-Oriented Construction of Multi-Scroll Attractor via a Memristor Model. 918-931 - Lin Fu, Shiguo Peng, Juan Wang:
Semiglobal Finite-Time Stability of Impulsive Systems. 932-940 - Adou Sangbone Assoa, Ashwin Bhat, Sigang Ryu, Arijit Raychowdhury:
MDS-DOA: Fusing Model-Based and Data-Driven Approaches for Modular, Distributed, and Scalable Direction-of-Arrival Estimation. 941-952 - Yu-En Wu, Sin-Cheng Huang, Che-Ming Chang:
A Novel Single-Switch High Step-Up DC-DC Converter With High-Voltage Conversion Ratio. 953-962 - Peng Gu, Yunrui Hao, Xingzhen Guo, Dongsheng Yang, Peng Zhao, Bowen Zhou, Yijie Wang:
A Wide Air Gap IPT System for Distribution Insulator Applications Based on Reconfigurable Autotransformer Coupling Structure. 963-975
Volume 72, Number 3, March 2025
- William Kolodziejski, Robson Domanski, Luciano Agostini:
FastGW: A Machine Learning-Based Early Skip for the AV1 Global Warped Motion Compensation. 977-988 - Léopold Van Brandt, Michele Bonnin, Maurício Banaszeski da Silva, Pascal Bolcato, Gilson I. Wirth, Denis Flandre, Jean-Charles Delvenne:
Modeling and Predicting Noise-Induced Failure Rates in Ultra-Low-Voltage SRAM Bitcells Affected by Process Variations. 989-1002 - Donggyu Minn, Kiseo Kang, Jaeho Lee, Seongchan Bae, Byungjun Kim, Jaehoon Lee, Jae-Yoon Sim:
A 40 nm Cryo-CMOS Homodyne-Demodulation Readout SoC for Superconducting Qubits. 1003-1016 - Hyuk Sun, Paul Wilkins, Steve Rose, Gil Engel:
Detection and Mitigation of nBTI Aging of a High Precision Current Comparator in 16 nm FinFET Technology. 1017-1028 - Xu Yan, Jingyuan Zhang, Baoguo Yang, Si-Ping Gao, Yongxin Guo:
Compact Reconfigurable Dual-Band MMIC SPDT/SP4T Switches With On-Chip Coupled-Line Structure in GaN-on-SiC HEMT Technology. 1029-1041 - Xu Wang, Michael Peter Kennedy:
Analysis and Mitigation of Excess Phase Noise and Spurs in Digital-to-Time-Converter-Enhanced Fractional- N Frequency Synthesizers. 1042-1055 - Ankur Singh, Dowon Kim, Hyunkeun Lee, Byung-Geun Lee:
A High-Frequency CMOS Meminductor Emulator for Spiking Neuron. 1056-1067 - Yuke Shen, Jiacheng Liu, Kui Wen, Yanbo Zhang, Yi Shen, Shubin Liu, Zhangming Zhu:
A 36.8-μW 66 nV/√Hz 85.7 dB-System-SNDR Reconfigurable Single-Channel ExG Acquisition System for Bio-Sensor Modules. 1068-1080 - Donghwan Seo, Jung-Gyun Kim, Injune Yeo, Hyunkeun Lee, Byung-Geun Lee:
Analysis of Pixel Noise in Dynamic Vision Sensors. 1081-1092 - Jonah Van Assche, Charlotte Frenkel, Ali Safa, Georges G. E. Gielen:
FREYA: A 0.023-mm²/Channel, 20.8- μW/Channel, Event-Driven 8-Channel SoC for Spiking End-to-End Sensing of Time-Sparse Biosignals. 1093-1104 - Yoichi Iizuka, Akihide Maezono, Wataru Saito, Kazuhiko Takami, Fukashi Morishita:
A Low Noise 8.3-Mpixel CMOS Image Sensor With Selectable Multiple Sampling Technique by 5.36 GHz Global Counter and Dual Latch Skew Canceler. 1105-1113 - Alvaro Urain, David del Rio, Andoni Beriain, Héctor Solar, Roc Berenguer:
Area-Efficient SiGe BiCMOS LNA With Wideband Frequency Tuning Capability Across D and G Bands. 1114-1125 - Shuai Wu, Yubing Li, Tao Tan, Zemeng Huang, Jiaze Qiao, Xiuping Li:
An Automated Circuit Topology Generation and Optimization Method for CMOS Low-Noise Amplifiers. 1126-1139 - Leilei Xiao, Yubing Li, Haifeng Chen, Yujia Chen, Zemeng Huang, Peng Ke, Xiuping Li:
A Novel Design Method for CML Frequency Divider Based on C/Id and G/Id and Application for Quadrature-Injection CML Frequency Dividers. 1140-1151 - Gaurav Srivastava, Darshak Bhatt:
A 16-20 GHz Mixer First Receiver Architecture With Active Inductor-Based Low-Pass Elliptic Filter With High OOB-IIP3 in 180 nm CMOS. 1152-1164 - Zhizhan Yang, Haochen Zhang, Jun Yin, Rui Paulo Martins, Pui-In Mak:
An 840-to-970 MHz Multimodal Wake-Up Receiver With a Q-Equalized Antenna-ED Interface and 2-Dimensional Wake-Up Identification. 1165-1177 - Sengjun Jo, Hyeonjun Kim, Kuduck Kwon:
IIP2-Calibration-Free 5G NR Cellular Receiver Front-End With Mixer-Sharing Global N-Path Notch Filter Feedback Achieving +72 dBm IIP2. 1178-1190 - Prema Kumar Govindaswamy, Nijwm Wary, Vijay Shankar Pasupureddi:
A 0.0375-pJ/bit Charge-Steering Based Hybrid for 8-Gb/s/pin Full-Duplex Chip-to-Chip Interconnects in 65-nm CMOS. 1191-1203 - Wen Zhou, Yahya Tousi:
Phase Modulated Bistatic Radar With an Analog Correlator: A Systematic Study. 1204-1217 - Shao Fei Bo, Jun-Hui Ou, Pei Ming Wang, Huaiguang Jiang, Xiu Yin Zhang:
Battery-Free Hybrid Ambient RF and Wind Energy Harvester for Outdoor IoTs. 1218-1228 - Dengfeng Wang, Weifeng He, Qin Wang, Hailong Jiao, Yanan Sun:
Robust Monolithic 3D Carbon-Based Computing-in-SRAM With Variation-Aware Bit-Wise Data-Mapping for High-Performance and Integration Density. 1229-1242 - Yuhao Chen, Hongge Li, Yinjie Song, Xinyu Zhu:
Recoding Hybrid Stochastic Numbers for Preventing Bit Width Accumulation and Fault Tolerance. 1243-1255 - Yao Qin, Mingyu Wang, Jiahua Yan, Tao Lu, Zhiyi Yu:
CINOC: Computing in Network-On-Chip With Tiled Many-Core Architectures for Large-Scale General Matrix Multiplications. 1256-1268 - Zhengzhe Wei, Boyi Dong, Yuqi Su, Yi Wang, Chuanshi Yang, Yuncheng Lu, Chao Wang, Tony Tae-Hyoung Kim, Yuanjin Zheng:
A 2.793 μW Near-Threshold Neuronal Population Dynamics Trajectory Filter for Reliable Simultaneous Localization and Mapping. 1269-1281 - Siyu Zhang, Qiwei Dong, Wendong Mao, Zhongfeng Wang:
A Unified Accelerator for All-in-One Image Restoration Based on Prompt Degradation Learning. 1282-1295 - Huihong Shi, Haikuo Shao, Wendong Mao, Zhongfeng Wang:
Trio-ViT: Post-Training Quantization and Acceleration for Softmax-Free Efficient Vision Transformer. 1296-1307 - Yu Wang, Jin Zhang, Youlong Wu, Fei Lyu, Yuanyong Luo:
A Universal Methodology of Complex Number Computation for Low-Complexity and High-Speed Implementation. 1308-1320 - Haochen Zhang, Xinyuan Qiao, Jing Tian, Suwen Song, Zhongfeng Wang:
Fast Hardware Architecture With Efficient Matrix Computations for the Key Generation of Classic McEliece. 1321-1331 - Pradeep Kumar Gopalakrishnan, Chip-Hong Chang, Arindam Basu:
HAST: A Hardware-Efficient Spatio-Temporal Correlation Near-Sensor Noise Filter for Dynamic Vision Sensors. 1332-1345 - Zhengzhe Wei, Junjie Mu, Yuanjin Zheng, Tony Tae-Hyoung Kim, Bongjin Kim:
A Graph-Based Accelerator of Retinex Model With Bit-Serial Computing for Image Enhancements. 1346-1357 - Jianfei Wang, Chen Yang, Yishuo Meng, Fahong Zhang, Jia Hou, Siwei Xiang, Yang Su:
A Reconfigurable and Area-Efficient Polynomial Multiplier Using a Novel In-Place Constant-Geometry NTT/INTT and Conflict-Free Memory Mapping Scheme. 1358-1371 - Pattimi Hari, Kota Naga Srinivasarao Batta, Polamarasetty P. Kumar, Ramakrishna S. S. Nuvvula, Baseem Khan, Aanchal Verma, R. K. Saket:
Fast Coding Unit Depth Identification Using Texture and Multiple Deep Learning Architectures. 1372-1382 - Qiqiao Wu, Honghu Yang, Yixuan Liu, Yue Cao, Yongkang Han, Haijun Jiang, Keji Zhou, Hailan Yi, Jianguo Yang, Qi Liu:
A Novel Neuromorphic Hardware Using Area-Efficient Chain RRAM-Based Synapses and Compact Neurons With (Anti-) Integration Scheme. 1383-1396 - Peng Zhang, Da-Wei Wang, Wen-Sheng Zhao:
A Thermal and Power Integrity Co-Optimization Framework for 2.5-D Integrated Microsystem. 1397-1410 - Mohamed A. Nadeem, Chandan Kumar Jha, Rolf Drechsler:
Polynomial Formal Verification of Multi-Valued Approximate Circuits Within Constant Cutwidth. 1411-1424 - Shanlin Liu, Yingwei Zhang, Xudong Zhao:
Adaptive Event-Triggered Control for PDE-ODE Cascade Systems via Hierarchical Sliding Mode. 1425-1437 - Tian Zhou, Shiyuan Wang, Junhui Qian, Yunfei Zheng, Qiangqiang Zhang, Yingying Xiao:
Gauss Hermite Fourier Features Based on Maximum Correntropy Criterion for Adaptive Filtering. 1438-1451 - Jun Cheng, Na Liu, Leszek Rutkowski, Jinde Cao, Huaicheng Yan, Liang Hua:
Space-Time Sampled-Data Control for Memristor- Based Reaction-Diffusion Neural Networks With Nonhomogeneous Sojourn Probabilities. 1452-1461 - Shan Jiang, Ben Niu, Xingxing Ju, Hongyu Ma:
A Noise-Tolerant Proximal Neurodynamic Algorithm for Solving MVIPs in Fixed-Time With Circuit Implementations and Applications. 1462-1471 - Shan Cao, Shan Chen, Limin Jiang, Zhiyuan Jiang:
A Critical-Set-Based Multi-Bit Successive Cancellation List Decoder for Polar Codes: Algorithm and Implementation. 1472-1485 - Zhaowei Liu, Yong Li, Ziqian Hu, Zeyu Zang, Xianglin Wen, Zhengyou He:
A Wide-Range Self-Powered Current Measurement Method Based on Induced Current Multiplexing for Online Monitoring Devices in Transmission Lines. 1486-1494
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