"A 24-29.5-GHz Scalable 2 × 2 I-Q TX/RX Chipset With Streamlined IF ..."

Long Wang et al. (2025)

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DOI: 10.1109/TCSI.2024.3438555

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type: Journal Article

metadata version: 2025-02-14

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Long Wang, Jixin Chen, Zhe Chen, Xiaoyue Xia, Yun Hu, Sidou Zheng, Zekun Li, Rui Zhou, Peigen Zhou, Jianyi Zhou, Wei Hong:
A 24-29.5-GHz Scalable 2 × 2 I-Q TX/RX Chipset With Streamlined IF Interfaces for DBF Systems. IEEE Trans. Circuits Syst. I Regul. Pap. 72(1): 155-168 (2025)

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