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Michael Pietzko
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2020 – today
- 2024
- [c9]Ahmed Abdelaal, Michael Pietzko, Jonathan Ungethüm, John G. Kauffman, Maurits Ortmanns:
Using Negative-R Assisted Integrators in Wide-band Delta-Sigma Modulators. ISCAS 2024: 1-5 - [c8]Michael Pietzko, Jonathan Ungethüm, Ahmed Abdelaal, John G. Kauffman, Maurits Ortmanns:
A 600MS/s 10-bit SAR ADC with unit via-based delta-length C-DAC in 22nm FDSOI. ISCAS 2024: 1-5 - 2023
- [j1]Michael Pietzko, Jonathan Ungethüm, John G. Kauffman, Maurits Ortmanns:
Delay Error Shaping in ΔΣ Modulators Using Time-Interleaved High Resolution Quantizers. IEEE Trans. Circuits Syst. I Regul. Pap. 70(7): 2700-2710 (2023) - [c7]Jonathan Ungethüm, Michael Pietzko, Ahmed Abdelaal, John G. Kauffman, Maurits Ortmanns:
A Chopped 6-bit 1.6 GS/s SAR ADC Utilizing Slow Decision Information in 22 nm FDSOI. ESSCIRC 2023: 141-144 - [c6]Michael Pietzko, Julian Spiess, Jonathan Ungethüm, John G. Kauffman, Qiang Li, Maurits Ortmanns:
Bitwise ELD Compensation under Integrator Nonidealities in ΔΣ Modulators. NEWCAS 2023: 1-5 - 2022
- [c5]Jonathan Ungethüm, Michael Pietzko, John G. Kauffman, Qiang Li, Maurits Ortmanns:
Maximizing the Inter-Stage Gain in CT 0-X MASH Delta-Sigma-Modulators. ISCAS 2022: 561-565 - [c4]Michael Pietzko, Jonathan Ungethüm, John G. Kauffman, Qiang Li, Maurits Ortmanns:
Bitwise ELD Compensation in Δ∑ Modulators. ISCAS 2022: 566-570 - 2021
- [c3]Ahmed Abdelaal, Michael Pietzko, Mohamed A. Mokhtar, John G. Kauffman, Maurits Ortmanns:
FIR Filter with Symmetric Non-Equal Coefficients for CT Delta-Sigma Modulators. ISCAS 2021: 1-5 - [c2]Michael Pietzko, Johannes Wagner, Ahmed Abdelaal, John G. Kauffman, Maurits Ortmanns:
Influence of Excess Loop Delay on the STF of Continuous-Time Delta-Sigma Modulators. ISCAS 2021: 1-5 - [c1]Chinwuba D. Ezekwe, Saikrishna Ganta, Xinyu Xing, Anton Grad, Thomas Mayer, Andrea Visconti, Francesco Diazzi, Man-Chia Chen, Danielle Morton, Luca Valli, Robert Wolf, Ashkan Eghtesadi, Tobias Wolfer, Michael Pietzko, Alexander Grathwohl, Thomas Northemann, Richard Schoenleber, Ruslan Khalilyulin, Ishita Mukhopadhyay, Alexandru Negut, Artjom Kosov, Andreas Christian Serafin, Jan Hayek, Lin Sun:
A direct-digitization open-loop gyroscope frontend with +/-8000°/s full-scale range and noise floor of 0.0047°/s/√Hz. VLSI Circuits 2021: 1-2
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last updated on 2024-10-07 22:18 CEST by the dblp team
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