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ORCID13th MCSoC 2019: Singapore
- 13th IEEE International Symposium on Embedded Multicore/Many-core Systems-on-Chip, MCSoC 2019, Singapore, Singapore, October 1-4, 2019. IEEE 2019, ISBN 978-1-7281-4882-3
Session 1: Auto-Tuning for Multicore and GPU (ATMG2019)
- Chenhan D. Yu, Severin Reiz, George Biros:
Distributed O(N) Linear Solver for Dense Symmetric Hierarchical Semi-Separable Matrices. 1-8 - Satoshi Ohshima, Ichitaro Yamazaki, Akihiro Ida, Rio Yokota:
Optimization of Numerous Small Dense-Matrix-Vector Multiplications in H-Matrix Arithmetic on GPU. 9-16 - Mulya Agung
, Muhammad Alfian Amrizal, Ryusuke Egawa, Hiroyuki Takizawa:
An Automatic MPI Process Mapping Method Considering Locality and Memory Congestion on NUMA Systems. 17-24 - Tomohiro Suzuki:
Performance Tuning of Tile Matrix Decomposition. 25-31
Session 2: Low-power Solutions for Future SoC design
- Hayate Okuhara, Ryosuke Kazami, Hideharu Amano:
A System Delay Monitor Exploiting Automatic Cell-Based Design Flow and Post-Silicon Calibration. 32-37 - Mark Sagi, Nguyen Anh Vu Doan, Thomas Wild, Andreas Herkersdorf:
Multicore Power Estimation using Independent Component Analysis Based Modeling. 38-45 - Johannes Maximilian Kühn:
Building Scalable and Highly Efficient Accelerators Near the End of Conventional Scaling. 46-52
Session 3-A: Digital Circuit & FPGA-based Design - I
- Koki Honda, Kaijie Wei, Hideharu Amano:
FPGA/Python Co-Design for Lane Line Detection on a PYNQ-Z1 Board. 53-60 - Hayato Kato, Hiroshi Saito:
Design of Asynchronous CNN Circuits on Commercial FPGA from Synchronous CNN Circuits. 61-67 - Ahmed Kamaleldin, Muhammad Ali, Pedram Amini Rad, Marcus Gottschalk, Diana Göhringer:
Modular Memory System for RISC-V Based MPSoCs on Xilinx FPGAs. 68-73 - Theingi Myint, Motoki Amagasaki, Qian Zhao, Masahiro Iida, Masato Kiyama:
A Novel SLM-Based Virtual FPGA Overlay Architecture. 74-80
Session 3-B: Machine Learning
- Masato Kiyama, Motoki Amagasaki, Masahiro Iida:
Deep Learning Framework with Arbitrary Numerical Precision. 81-86 - Tee Hui Teo, Wei Ming Tan, Yi Shu Tan:
Tumour Detection using Convolutional Neural Network on a Lightweight Multi-Core Device. 87-92 - Ryosuke Kuramochi, Youki Sada, Masayuki Shimoda, Shimpei Sato, Hiroki Nakahara:
Many Universal Convolution Cores for Ensemble Sparse Convolutional Neural Networks. 93-100 - Jagadish Kumar Ranbirsingh, Hanke Kimm, Haklin Kimm:
Distributed Neural Networks using TensorFlow over Multicore and Many-Core Systems. 101-107
Session 4-A: Digital Circuit & FPGA-based Design - II
- Katsunoshin Matsui, Md. Ashraful Islam, Kenji Kise:
An Efficient Implementation of a TAGE Branch Predictor for Soft Processors on FPGA. 108-115 - Takeshi Ohkawa, Ikuta Tanigawa, Mikiko Sato, Kenji Hisazumi, Nobuhiko Ogura, Harumi Watanabe:
Prototype of FPGA Dynamic Reconfiguration Based-on Context-Oriented Programming. 116-122 - Akihiro Fukuhara, Tomomu Iwai, Yuiko Sakuma, Hiroaki Nishi:
Implementation of Content-Based Anonymization Edge Router on NetFPGA. 123-128
Session 4-B: Intelligent Systems and Learning Technologies: Models, Methods, and Applications - II
- Rentaro Yoshioka, Naoyuki Murata:
Unified Symbol Framework to Improve UI Comprehension. 129-134 - Sarika Jain, Archana Patel:
Smart Ontology-Based Event Identification. 135-142 - Md. Atiqur Rahman, Mohamed Hamada:
A Semi-Lossless Image Compression Procedure using a Lossless Mode of JPEG. 143-148
Session 5-A: Interconnection Networks - I
- Miguel Gorgues Alonso, José Flich, Meriem Turki, Davide Bertozzi:
A Low-Latency and Flexible TDM NoC for Strong Isolation in Security-Critical Systems. 149-156 - Zhengqian Han, Michael Conrad Meyer, Xin Jiang, Takahiro Watanabe:
Low-Cost Congestion Detection Mechanism for Networks-on-Chip. 157-163 - Jie Hou, Qi Han, Martin Radetzki:
A Machine Learning Enabled Long-Term Performance Evaluation Framework for NoCs. 164-171 - Michael Conrad Meyer, Yu Wang, Takahiro Watanabe:
Fault-Tolerant Traffic-Aware Routing Algorithm for 3-D Photonic Networks-on-Chip. 172-179
Session 5-B: Intelligent Systems and Learning Technologies: Models, Methods, and Applications - II
- Kazuki Anzai, Yutaka Watanobe:
Algorithm to Determine Extended Edit Distance between Program Codes. 180-186 - Kenta Terada, Yutaka Watanobe:
Automatic Generation of Fill-in-the-Blank Programming Problems. 187-193 - Hiroki Ohashi, Yutaka Watanobe:
Convolutional Neural Network for Classification of Source Codes. 194-200 - Takayuki Hoshino, Rentaro Yoshioka:
Design of Knowledge Templates and Multi-View Symbols for Experiential Learning. 201-208
Session 6-A: Interconnection Networks - II
- Siying Xu, Michael Conrad Meyer, Xin Jiang, Takahiro Watanabe:
A Traffic-Robust Routing Algorithm for Network-on-Chip Systems. 209-216 - Adele Maleki, Hamidreza Ahmadian, Roman Obermaisser:
Fault Detection and Localization for Network-on-Chips in Mixed-Criticality Systems. 217-222 - Khanh N. Dang, Akram Ben Ahmed, Xuan-Tu Tran:
An on-Communication Multiple-TSV Defects Detection and Localization for Real-Time 3D-ICs. 223-228 - Yaoying Luo, Michael Conrad Meyer, Xin Jiang, Takahiro Watanabe:
A Hotspot-Pattern-Aware Routing Algorithm for Networks-on-Chip. 229-235
Session 6-B: Applications and Architectures designed for energy efficient hardware
- Baohua Liu, Wenfeng Shen, Xin Zhu, Xingyu Wangchen:
Integrating Intra-and Intercellular Simulation of a 2D HL-1 Cardiac Model Based on Embedded GPUs. 236-240 - Lu Peng, Wentao Shi, Jian Zhang, Samuel Irving:
Exploiting Model-Level Parallelism in Recurrent Neural Network Accelerators. 241-248
Session 7-A: System Design
- Elsayed A. Elsayed, Kenji Kise:
Towards an Efficient Hardware Architecture for Odd-Even Based Merge Sorter. 249-256 - Kyle Kuan, Tosiron Adegbija:
Energy and Performance Analysis of STTRAM Caches for Mobile Applications. 257-264 - Thanh Cong, François Charot:
Designing Application-Specific Heterogeneous Architectures from Performance Models. 265-272 - Valentina Richthammer, Michael Glaß:
Efficient Search-Space Encoding for System-Level Design Space Exploration of Embedded Systems. 273-280
Session 7-B: Multicore/Manycore SoCs Programming
- Amin Majd, Mohammad Loni, Golnaz Sahebi, Masoud Daneshtalab, Elena Troubitsyna:
A Cloud Based Super-Optimization Method to Parallelize the Sequential Code's Nested Loops. 281-287 - Aki Nakamura, Yuichi Okuyama, Ryuichi Oka:
Real-Time Implementation of Time-Space Continuous Dynamic Programming for Air-Drawn Character Recognition Using GPUs. 288-294 - Stéphane Louise:
Graph Transformations and Derivation of Scheduling Constraints Applied to the Mapping of Real-Time Distributed Applications. 295-303
Session 8-A: Digital Circuit & FPGA-based Design - III
- Riadh Ben Abdelhamid, Yoshiki Yamaguchi, Taisuke Boku:
MITRACA: A Next-Gen Heterogeneous Architecture. 304-311 - Sayaka Terashima, Takuya Kojima, Hayate Okuhara, Kazusa Musha, Hideharu Amano, Ryuichi Sakamoto, Masaaki Kondo, Mitaro Namiki:
A Preliminary Evaluation of Building Block Computing Systems. 312-319 - Van-Toan Tran, Quang-Kien Trinh, Van-Phuc Hoang:
Enhanced ID Authentication Scheme Using FPGA-Based Ring Oscillator PUF. 320-327 - Keita Azegami, Kazusa Musha, Kazuei Hironaka, Akram Ben Ahmed, Michihiro Koibuchi, Yao Hu, Hideharu Amano:
A STDM (Static Time Division Multiplexing) Switch on a Multi-FPGA System. 328-333
Session 8-B: Scalable and Flexible Many-Core Mapping and Runtime Techniques
- Jan Spieck, Stefan Wildermann, Tobias Schwarzer, Jürgen Teich, Michael Glaß:
Data-Driven Scenario-Based Application Mapping for Heterogeneous Many-Core Systems. 334-341 - Zeyang Dai, Lei Jing:
Real-Time Attitude Estimation of Sigma-Point Kalman Filter via Matrix Operation Accelerator. 342-346 - Manuel Strobel, Martin Radetzki:
Design-Time Memory Subsystem Optimization for Low-Power Multi-Core Embedded Systems. 347-353
Session 9: Reliable and Real-time Multicore/Manycore SoCs
- Alexander M. Gruzlikov, Nikolai V. Kolesov, Dmitrii Kostygov, Marina V. Tolmacheva:
A Real-Time Fault-Tolerant and Power-Efficient Multicore System on Chip. 354-361 - Julien Durand, Youcef Bouchebaba, Luca Santinelli:
Statistical Analysis for Shared Resources Effects with Multi-Core Real-Time Systems. 362-371 - Eugene Yip, Erjola Lalo, Gerald Lüttgen, Andreas Sailer:
Lightweight Semantics-Preserving Communication for Real-Time Automotive Software. 372-379
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