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ORCIDXin Jiang 0003
Person information
- affiliation: National Institute of Technology, Kitakyushu College, Kitakyushu, Japan
- affiliation: Waseda University, Graduate School of Information, Production and Systems, Japan
Other persons with the same name
- Xin Jiang — disambiguation page
- Xin Jiang 0001
![[0000-0003-3030-2694]](https://dblp.uni-trier.de./img/orcid-mark.12x12.png "0000-0003-3030-2694")
— Harbin Institute of Technology, School of Mechanical Engineering and Automation, Shenzhen, China (and 1 more) - Xin Jiang 0002 — Huawei Noah's Ark Lab, China (and 1 more)
- Xin Jiang 0004 — Jinan University, Second Clinical Medical College, Shenzhen People's Hospital, Guangzhou, China (and 3 more)
- Xin Jiang 0005 — Beijing Academy of Artificial Intelligence, China
- Xin Jiang 0006 — Wenzhou University of Technology, School of Data Science and Artificial Intelligence, China (and 1 more)
- Xin Jiang 0007 — Harbin Institute of Technology, Department of Astronautic Engineering, China
- Xin Jiang 0008 — Beihang University, Institute of Artificial Intelligence, Beijing, China
- Xin Jiang 0009 — Zhejiang University, Institute of Information and Communication Engineering, Hangzhou, China
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2010 – 2019
- 2019
[c9]Zhengqian Han, Michael Conrad Meyer, Xin Jiang, Takahiro Watanabe:
Low-Cost Congestion Detection Mechanism for Networks-on-Chip. MCSoC 2019: 157-163- [c8]Siying Xu, Michael Conrad Meyer, Xin Jiang, Takahiro Watanabe:
A Traffic-Robust Routing Algorithm for Network-on-Chip Systems. MCSoC 2019: 209-216 - [c7]Yaoying Luo, Michael Conrad Meyer, Xin Jiang, Takahiro Watanabe:
A Hotspot-Pattern-Aware Routing Algorithm for Networks-on-Chip. MCSoC 2019: 229-235 - 2018
- [c6]Jindun Dai, Renjie Li, Xin Jiang, Takahiro Watanabe:
PDA-HyPAR: Path-diversity-aware hybrid planar adaptive routing algorithm for 3D NoCs. ISQED 2018: 131-137 - 2017
- [j8]Xin Jiang, Xiangyang Lei, Lian Zeng, Takahiro Watanabe:
High Performance Virtual Channel Based Fully Adaptive 3D NoC Routing for Congestion and Thermal Problem. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 100-A(11): 2379-2391 (2017) - [c5]Jindun Dai, Xin Jiang, Takahiro Watanabe:
An adaptive routing algorithm based on network partitioning for 3D Network-on-Chip. CITS 2017: 229-233 - [c4]Jindun Dai, Wenda Ma, Xin Jiang, Takahiro Watanabe:
Hybrid path-diversity-dominant output selection method for Network-on-Chip systems. ISOCC 2017: 125-126 - [c3]Xin Jiang, Xiangyang Lei, Lian Zeng, Takahiro Watanabe:
High performance virtual channel based fully adaptive thermal-aware routing for 3D NoC. ISQED 2017: 289-295 - [c2]Jindun Dai, Xin Jiang, Renjie Li, Takahiro Watanabe:
An Efficient Deadlock-Free Adaptive Routing Algorithm for 3D Network-on-Chips. MCSoC 2017: 29-36 - 2016
- [j7]Lian Zeng, Tieyuan Pan, Xin Jiang, Takahiro Watanabe:
An Efficient Highly Adaptive and Deadlock-Free Routing Algorithm for 3D Network-on-Chip. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 99-A(7): 1334-1344 (2016) - 2015
- [j6]Lian Zeng, Xin Jiang, Takahiro Watanabe:
A Performance Enhanced Dual-switch Network-on-chip Architecture. Inf. Media Technol. 10(3): 405-414 (2015) - [j5]Lian Zeng, Xin Jiang, Takahiro Watanabe:
A Performance Enhanced Dual-switch Network-on-chip Architecture. IPSJ Trans. Syst. LSI Des. Methodol. 8: 85-94 (2015) - 2014
- [j4]Xin Jiang, Lian Zeng, Takahiro Watanabe:
A Sophisticated Routing Algorithm in 3D NoC with Fixed TSVs for Low Energy and Latency. Inf. Media Technol. 9(4): 404-412 (2014) - [j3]Xin Jiang, Lian Zeng, Takahiro Watanabe:
A Sophisticated Routing Algorithm in 3D NoC with Fixed TSVs for Low Energy and Latency. IPSJ Trans. Syst. LSI Des. Methodol. 7: 101-109 (2014) - 2013
- [j2]Xin Jiang, Ran Zhang, Takahiro Watanabe:
An Efficient Algorithm for 3D NoC Architecture Optimization. Inf. Media Technol. 8(2): 254-261 (2013) - [j1]Xin Jiang, Ran Zhang, Takahiro Watanabe:
An Efficient Algorithm for 3D NoC Architecture Optimization. IPSJ Trans. Syst. LSI Des. Methodol. 6: 34-41 (2013) - 2011
- [c1]Xin Jiang, Ran Zhang, Takahiro Watanabe:
An efficient design algorithm for exploring flexible topologies in custom adaptive 3D NoCs for high performance and low power. ASICON 2011: 535-538
Coauthor Index
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