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Lian Zeng
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2020 – today
- 2021
- [c5]Hao Chen, Sihao Huang, Lian Zeng, Cong Luo, Wulan Huang, Pan Liu:
A New Model for Mining Superior Uploaders on Bilibili. QRS Companion 2021: 401-406 - 2020
- [c4]Qingdan Huang, Liqiang Pei, Yong Wang, Lian Zeng:
AU Data Augmentation Method Based on Generative Adversarial Networks. AIAM 2020: 243-246
2010 – 2019
- 2019
- [c3]Qingdan Huang, Wenxiong Mo, Liqiang Pei, Lian Zeng:
3D Coordinate Calculation and Pose Estimation of Power Meter based on Binocular Stereo Vision. ICSCA 2019: 282-285 - 2017
- [j8]Xin Jiang, Xiangyang Lei, Lian Zeng, Takahiro Watanabe:
High Performance Virtual Channel Based Fully Adaptive 3D NoC Routing for Congestion and Thermal Problem. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 100-A(11): 2379-2391 (2017) - [c2]Xin Jiang, Xiangyang Lei, Lian Zeng, Takahiro Watanabe:
High performance virtual channel based fully adaptive thermal-aware routing for 3D NoC. ISQED 2017: 289-295 - 2016
- [j7]Lian Zeng, Tieyuan Pan, Xin Jiang, Takahiro Watanabe:
An Efficient Highly Adaptive and Deadlock-Free Routing Algorithm for 3D Network-on-Chip. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 99-A(7): 1334-1344 (2016) - [j6]Tieyuan Pan, Li Zhu, Lian Zeng, Takahiro Watanabe, Yasuhiro Takashima:
An Online Task Placement Algorithm Based on MER Enumeration for Partially Reconfigurable Device. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 99-A(7): 1345-1354 (2016) - [j5]Tieyuan Pan, Lian Zeng, Yasuhiro Takashima, Takahiro Watanabe:
A Fast MER Enumeration Algorithm for Online Task Placement on Reconfigurable FPGAs. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 99-A(12): 2412-2424 (2016) - 2015
- [j4]Lian Zeng, Xin Jiang, Takahiro Watanabe:
A Performance Enhanced Dual-switch Network-on-chip Architecture. Inf. Media Technol. 10(3): 405-414 (2015) - [j3]Lian Zeng, Xin Jiang, Takahiro Watanabe:
A Performance Enhanced Dual-switch Network-on-chip Architecture. IPSJ Trans. Syst. LSI Des. Methodol. 8: 85-94 (2015) - [c1]Lian Zeng, Takahiro Watanabe:
A performance enhanced dual-switch Network-on-Chip architecture. ASP-DAC 2015: 69-74 - 2014
- [j2]Xin Jiang, Lian Zeng, Takahiro Watanabe:
A Sophisticated Routing Algorithm in 3D NoC with Fixed TSVs for Low Energy and Latency. Inf. Media Technol. 9(4): 404-412 (2014) - [j1]Xin Jiang, Lian Zeng, Takahiro Watanabe:
A Sophisticated Routing Algorithm in 3D NoC with Fixed TSVs for Low Energy and Latency. IPSJ Trans. Syst. LSI Des. Methodol. 7: 101-109 (2014)
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