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ORCIDIPSJ Transactions on System LSI Design Methodology, Volume 8
Volume 8, February 2015
- Hiroyuki Tomiyama:
Message from the Editor-in-Chief. 1
- Jishen Zhao, Cong Xu, Ping Chi, Yuan Xie:
Memory and Storage System Design with Nonvolatile Memory Technologies. 2-11 - Zhiru Zhang
, Deming Chen, Steve Dai, Keith A. Campbell:
High-level Synthesis for Low-power Design. 12-25
- Salita Sombatsiri, Yoshinori Takeuchi, Masaharu Imai:
An Efficient Performance Estimation Method for Configurable Multi-layer Bus-based SoC. 26-37 - Arif Ullah Khan, Tsuyoshi Isshiki, Dongju Li, Hiroaki Kunieda:
Efficient Design Exploration Framework of SW/HW Systems Based on Tightly-coupled Thread Model. 38-50
- Tulika Mitra:
Heterogeneous Multi-core Architectures. 51-62 - Matthias Jung, Christian Weis, Norbert Wehn:
DRAMSys: A Flexible DRAM Subsystem Design Space Exploration Framework. 63-74
- Ran Zhang, Tieyuan Pan, Li Zhu, Takahiro Watanabe:
Layer Assignment and Equal-length Routing for Disordered Pins in PCB Design. 75-84 - Lian Zeng, Xin Jiang, Takahiro Watanabe:
A Performance Enhanced Dual-switch Network-on-chip Architecture. 85-94
- Yuki Ando, Yukihito Ishida, Shinya Honda, Hiroaki Takada, Masato Edahiro:
Automatic Synthesis of Inter-heterogeneous-processor Communication for Programmable System-on-chip. 95-99 - Takuya Hatayama, Hideki Takase, Kazuyoshi Takagi, Naofumi Takagi:
An Allocation Optimization Method for Partially-reliable Scratch-pad Memory in Embedded Systems. 100-104
- Takaaki Miyajima, David B. Thomas, Hideharu Amano:
Courier: A Toolchain for Application Acceleration on Heterogeneous Platforms. 105-115
- Motoki Amagasaki, Qian Zhao, Masahiro Iida, Morihiro Kuga, Toshinori Sueyoshi:
A 3D FPGA Architecture to Realize Simple Die Stacking. 116-122
- Yusaku Hirai, Shinya Yano, Toshimasa Matsuoka:
A Delta-Sigma ADC with Stochastic Quantization. 123-130
- Shinichi Nishizawa, Tohru Ishihara, Hidetoshi Onodera:
Layout Generator with Flexible Grid Assignment for Area Efficient Standard Cell. 131-135
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