default search action
Google
Google Scholar
Semantic Scholar
Internet Archive Scholar
CiteSeerX
ORCID29th IOLTS 2023: Crete, Greece
- Alessandro Savino, Michail Maniatakos, Stefano Di Carlo, Dimitris Gizopoulos:
29th International Symposium on On-Line Testing and Robust System Design, IOLTS 2023, Crete, Greece, July 3-5, 2023. IEEE 2023, ISBN 979-8-3503-4135-5 - Dimitris Mouris
, Charles Gouert, Nektarios Georgios Tsoutsos:
$\text{MP}\ell\circ \mathrm{C}$: Privacy-Preserving IP Verification Using Logic Locking and Secure Multiparty Computation. 1-8 - Prokash Ghosh, Yogesh Gholap, Virendra Singh:
On-Chip SRAM Disclosure Attack Prevention Technique for SoC. 1-7 - Pegdwende Romaric Nikiema, Alessandro Palumbo, Allan Aasma, Luca Cassano, Angeliki Kritikakou, Ari Kulmala, Jari Lukkarila, Marco Ottavi, Rafail Psiakis, Marcello Traiola:
Towards Dependable RISC-V Cores for Edge Computing Devices. 1-7 - Raj Kumar Choudhary, Janeel Patel, Virendra Singh:
ERrOR: Improving Performance and Fault Tolerance Using Early Execution. 1-3 - Hardi Selg, Maksim Jenihhin, Peeter Ellervee, Jaan Raik:
ML-Based Online Design Error Localization for RISC-V Implementations. 1-7 - Raghunandana K. K, B. K. S. V. L. Varaprasad, Matteo Sonza Reorda, Virendra Singh:
TREFU: An Online Error Detecting and Correcting Fault Tolerant GPGPU Architecture. 1-7 - Marcel Sarraseca, Sergi Alcaide, Francisco Fuentes, Juan Carlos Rodriguez, Feng Chang, Ilham Lasfar, Ramon Canal, Francisco J. Cazorla, Jaume Abella:
SafeLS: An Open Source Implementation of a Lockstep NOEL-V RISC-V Core. 1-7 - Styliani Tompazi, Georgios Karakonstantis:
Microarchitecture-Aware Timing Error Prediction via Deep Neural Networks. 1-8 - Z. Zhang, Zhihang Wu, Christian Weis, Norbert Wehn, Mehdi Baradaran Tahoori:
A Learning-Based Approach for Single Event Transient Analysis in Pass Transistor Logic. 1-7 - George Papadimitriou, Dimitris Gizopoulos, Harish Dattatraya Dixit, Sriram Sankar:
Silent Data Corruptions: The Stealthy Saboteurs of Digital Integrity. 1-7 - Pierre-Antoine Tissot, Lilian Bossuet, Vincent Grosso:
BALoo: First and Efficient Countermeasure Dedicated to Persistent Fault Attacks. 1-7 - Harish Dixit:
Keytone: Silent Data Corruptions at Scale. 1-2 - Fabian Vargas, Douglas Borba, Juliano Benfica, Rizwan Tariq Syed:
Artificial Neural Network Accelerator for Classification of In-Field Conducted Noise in Integrated Circuits' DC Power Lines. 1-6 - Maryam Esmaeilian, Aghiles Douadi, Zahra Kazemi, Vincent Beroulle, Amir-Pasha Mirbaha, Mahdi Fazeli, Elena Ioana Vatajelu, Paolo Maistri, Giorgio Di Natale:
Experimental Evaluation of Delayed-Based Detectors Against Power-off Attack. 1-3 - Sergio Vinagrero Gutierrez, Giorgio Di Natale, Elena Ioana Vatajelu:
On-Line Method to Limit Unreliability and Bit-Aliasing in RO-PUF. 1-6 - Prashanth Krishnamurthy, Hammond Pearce, Virinchi Roy Surabhi, Joshua Trujillo, Ramesh Karri, Farshad Khorrami:
An Integrated Testbed for Trojans in Printed Circuit Boards with Fuzzing Capabilities. 1-4 - Shotaro Sugitani, Ryuichi Nakajima, Takafumi Ito, Jun Furuta, Kazutoshi Kobayashi, Mathieu Louvat, Francois Jacquet, Jean-Christophe Eloy, Olivier Montfort, Lionel Jure, Vincent Huard:
Radiation Hardness Evaluations of a Stacked Flip Flop in a 22 nm FD-SOI Process by Heavy-Ion Irradiation. 1-5 - Seyedeh Maryam Ghasemi, Sergej Meschkov, Jonas Krautter, Dennis R. E. Gnad, Mehdi B. Tahoori:
SLM ISA and Hardware Extensions for RISC-V Processors. 1-5 - Gabriele Gavarini, Annachiara Ruospo, Ernesto Sánchez:
Evaluation and Mitigation of Faults Affecting Swin Transformers. 1-7 - Mahya Morid Ahmadi, Lilas Alrahis, Ozgur Sinanoglu, Muhammad Shafique:
ShapeShifter: Protecting FPGAs from Side-Channel Attacks with Isofunctional Heterogeneous Modules. 1-7 - Corrado De Sio, Daniele Rizzieri, Andrea Portaluri, Salvatore Gabriele La Greca, Sarah Azimi:
Radiation-Induced Errors in the Software Level of Real-Time Soft Processing System. 1-3 - Natalia Lylina, Stefan Holst, Hanieh Jafarzadeh, Alexandra Kourfali, Hans-Joachim Wunderlich:
Exploiting the Error Resilience of the Preconditioned Conjugate Gradient Method for Energy and Delay Optimization. 1-7 - Aghiles Douadi, Giorgio Di Natale, Paolo Maistri, Elena Ioana Vatajelu, Vincent Beroulle:
A Study of High Temperature Effects on Ring Oscillator Based Physical Unclonable Functions. 1-7 - Georgios Chatzitsompanis, Georgios Karakonstantis:
On the Facilitation of Voltage Over-Scaling and Minimization of Timing Errors in Floating-Point Multipliers. 1-7 - Ioannis Tsounis, Dimitris Agiakatsikas, Mihalis Psarakis:
Detecting Hardware Faults in Approximate Adders via Minimum Redundancy. 1-7 - Riku Iwamoto, Masanori Hashimoto:
Avoiding Soft Error-Induced Illegal Memory Accesses in GPU with Inter-Thread Communication. 1-7 - Wouter Legiest, Furkan Turan, Michiel Van Beirendonck, Jan-Pieter D'Anvers, Ingrid Verbauwhede:
Neural Network Quantisation for Faster Homomorphic Encryption. 1-3 - Yusei Honda, Yutaka Masuda, Tohru Ishihara:
Feedback-Tuned Fuzzing for Accelerating Quality Verification of Approximate Computing Design. 1-3 - Chandramouli N. Amarnath, Abhijit Chatterjee:
A Novel Approach to Error Resilience in Online Reinforcement Learning. 1-7 - Nasr-Eddine Ouldei Tebina, Laurent Maingault, Nacer-Eddine Zergainoh, Guillaume Hubert, Paolo Maistri:
Ray-Spect: Local Parametric Degradation for Secure Designs: An application to X-Ray Fault Injection. 1-7 - Yunus Emre Aslan, Florian Cacho, T. Kumar, D. K. Janardan, A. Kumar, F. Giner, M. Faurichon, Lorena Anghel:
Minimum SRAM Retention Voltage: Insight about optimizing Power Efficiency across Temperature Profile, Process Variation and Aging. 1-6 - Gaurav Kumar, Anjum Riaz, Yamuna Prasad, Satyadev Ahlawat:
On Evaluating the Security of Dynamic Scan Obfuscation Scheme. 1-7 - Paolo Bernardi, Lorenzo Cardone, Giusy Iaria, Davide Appello, Giuseppe Garozzo, Vincenzo Tancorre:
About the Correlation between Logical Identified Faulty Gates and their Layout Characteristics. 1-7 - Jose Cayo, Matias Melivilu, Antonio Rubio, Ioannis Vourkas:
On the Development of Prognostics and System Health Management (PHM) Techniques for ReRAM Applications. 1-4 - Ivan Rodriguez-Ferrandez, Leonidas Kosmidis, Maris Tali, David Steenari:
Space Shuttle: A Test Vehicle for the Reliability of the SkyWater 130nm PDK for Future Space Processors. 1-3
manage site settings
To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.
last updated on 2024-11-05 21:10 CET by the dblp team
all metadata released as open data under CC0 1.0 license
see also: Terms of Use | Privacy Policy | Imprint
dblp was originally created in 1993 at:
since 2018, dblp has been operated and maintained by:
the dblp computer science bibliography is funded and supported by:
