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ORCIDSeyedeh Maryam Ghasemi
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2020 – today
- 2024
[j1]Shanmukha Mangadahalli Siddaramu
, Ali Nezhadi, Mahta Mayahinia, Seyedeh Maryam Ghasemi, Mehdi B. Tahoori:
Hardware and Software Co-Design for Optimized Decoding Schemes and Application Mapping in NVM Compute-in-Memory Architectures. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 43(11): 3744-3755 (2024)- [c7]Seyedeh Maryam Ghasemi, Sergej Meschkov, Jonas Krautter, Dennis R. E. Gnad, Mehdi B. Tahoori:
In-Field Detection of Small Delay Defects and Runtime Degradation Using On-Chip Sensors. DATE 2024: 1-2 - [c6]Seyedeh Maryam Ghasemi, Jonas Krautter, Tara Gheshlaghi, Sergej Meschkov, Dennis R. E. Gnad, Mehdi B. Tahoori:
Degradation Monitoring Through Software-controlled On-chip Sensors for RISC-V. ETS 2024: 1-6 - 2023
- [c5]Seyedeh Maryam Ghasemi, Sergej Meschkov, Jonas Krautter, Dennis R. E. Gnad, Mehdi B. Tahoori:
SLM ISA and Hardware Extensions for RISC-V Processors. IOLTS 2023: 1-5 - [c4]Seyedeh Maryam Ghasemi, Sergej Meschkov, Jonas Krautter, Dennis R. E. Gnad, Mehdi B. Tahoori:
Enabling In-Field Parametric Testing for RISC-V Cores. ITC 2023: 367-376 - 2022
- [c3]Nooshin Nosrati, Seyedeh Maryam Ghasemi, Mahboobe Sadeghipour Roodsari, Zainalabedin Navabi:
Concurrent Error Detection for LSTM Accelerators. ETS 2022: 1-2 - 2020
- [c2]Saba Yousefzadeh, Katayoon Basharkhah, Nooshin Nosrati, Maryam Rajabalipanah, Seyedeh Maryam Ghasemi, Zainalabedin Navabi:
Reconfiguration of Embedded Accelerators by Microprogramming for Intensive Loop Computations. DDECS 2020: 1-4 - [c1]Maryam Rajabalipanah, Seyedeh Maryam Ghasemi, Nooshin Nosrati, Katayoon Basharkhah, Saba Yousefzadeh, Zainalabedin Navabi:
Reducing DFT hardware overhead by use of a test microprogram in a microprogrammed hardware accelerator. DFT 2020: 1-4
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