• case-insensitive prefix search: default
  e.g., sig matches "SIGIR" as well as "signal"
• exact word search: append dollar sign ($) to word
  e.g., graph$ matches "graph", but not "graphics"
• boolean and: separate words by space
  e.g., codd model
• boolean or: connect words by pipe symbol (|)
  e.g., graph|network

Update May 7, 2017: Please note that we had to disable the phrase search operator (.) and the boolean not operator (-) due to technical problems. For the time being, phrase search queries will yield regular prefix search result, and search terms preceded by a minus will be interpreted as regular (positive) search terms.

found 37 matches

• 2020
• 
  Mahdi Abbasi, Milad Rafiee:
  Efficient parallelisation of the packet classification algorithms on multi-core central processing units using multi-threading application program interfaces. IET Comput. Digit. Tech. 14(6): 313-321 (2020)
• 
  Mohammed A. Noaman Al-Hayanni, Fei Xia, Ashur Rafiev, Alexander B. Romanovsky, Rishad A. Shafik, Alex Yakovlev:
  Amdahl's law in the context of heterogeneous many-core systems - a survey. IET Comput. Digit. Tech. 14(4): 133-148 (2020)
• 
  Ihsen Alouani, Hamzeh Ahangari, Ozcan Ozturk, Smaïl Niar:
  Power-efficient reliable register file for aggressive-environment applications. IET Comput. Digit. Tech. 14(1): 1-8 (2020)
• 
  Nooshin Azimi, Reza Faghih Mirzaee, Keivan Navi, Amir Masoud Rahmani:
  Ternary DDCVSL: a combined dynamic logic style for standard ternary logic with single power source. IET Comput. Digit. Tech. 14(4): 166-175 (2020)
• 
  Nejmeddine Bahri, Randa Khemiri:
  Optimised HEVC encoder intra-only configuration. IET Comput. Digit. Tech. 14(6): 256-262 (2020)
• 
  M. Mohamed Asan Basiri:
  Efficient VLSI architectures of lifting based 3D discrete wavelet transform. IET Comput. Digit. Tech. 14(6): 247-255 (2020)
• 
  Nevena R. Brnovic, Veselin N. Ivanovic, Igor Djurovic, Marko Simeunovic:
  Multi-core hardware realisation of the quasi maximum likelihood PPS estimator. IET Comput. Digit. Tech. 14(5): 187-192 (2020)
• 
  Lalengmawia Chhangte, Alok Chakrabarty:
  Technique for two-dimensional nearest neighbour realisation of quantum circuits using weighted look-ahead. IET Comput. Digit. Tech. 14(6): 281-289 (2020)
• 
  Vaithiyanathan Dhandapani, Ravindra Kumar, Ashima Rai, Khushboo Sharma:
  Performance analysis of dynamic CMOS circuit based on node-discharger and twist-connected transistors. IET Comput. Digit. Tech. 14(3): 107-113 (2020)
• 
  Ganesh Kumar Ganjikunta, Subhendu Kumar Sahoo:
  Area and power-efficient variable-length fast Fourier transform for MR-OFDM physical layer of IEEE 802.15.4-g. IET Comput. Digit. Tech. 14(5): 193-200 (2020)
• 
  Mrinal Goswami, Jayanta Pal, Mayukh Roy Choudhury, Pritam P. Chougule, Bibhash Sen:
  In memory computation using quantum-dot cellular automata. IET Comput. Digit. Tech. 14(6): 336-343 (2020)
• 
  Anakhi Hazarika, Soumyajit Poddar, Hafizur Rahaman:
  Survey on memory management techniques in heterogeneous computing systems. IET Comput. Digit. Tech. 14(2): 47-60 (2020)
• 
  Rajib Lochan Jana, Soumyajit Dey, Arijit Mondal, Pallab Dasgupta:
  Automated planning for finding alternative bug traces. IET Comput. Digit. Tech. 14(6): 322-335 (2020)
• 
  Elyas Khajekarimi, Kamal Jamshidi, Abbas Vafaei:
  Integer linear programming model for allocation and migration of data blocks in the STT-RAM-based hybrid caches. IET Comput. Digit. Tech. 14(3): 97-106 (2020)
• 
  Pinar Kullu, Yilmaz Ar, Suleyman Tosun, Suat Ozdemir:
  Mapping application-specific topology to mesh topology with reconfigurable switches. IET Comput. Digit. Tech. 14(1): 9-16 (2020)
• 
  Jie Li, Shanshan Liu, Pedro Reviriego, Liyi Xiao, Fabrizio Lombardi:
  Scheme for periodical concurrent fault detection in parallel CRC circuits. IET Comput. Digit. Tech. 14(2): 80-85 (2020)
• 
  Wei Li, Jun Liang, Yunquan Zhang, Haipeng Jia, Lin Xiao, Qing Li:
  Accelerated LiDAR data processing algorithm for self-driving cars on the heterogeneous computing platform. IET Comput. Digit. Tech. 14(5): 201-209 (2020)
• 
  Rohit Lorenzo, Roy Pailly:
  Single bit-line 11T SRAM cell for low power and improved stability. IET Comput. Digit. Tech. 14(3): 114-121 (2020)
• 
  Raj Kumar Maity, Sayan Tripathi, Jagannath Samanta, Jaydeb Bhaumik:
  Lower complexity error location detection block of adjacent error correcting decoder for SRAMs. IET Comput. Digit. Tech. 14(5): 210-216 (2020)
• 
  Leonel Hernández Martínez, S. Saqib Khursheed, Sudhakar M. Reddy:
  LFSR generation for high test coverage and low hardware overhead. IET Comput. Digit. Tech. 14(1): 27-36 (2020)
• 
  Sandeep Mishra, Telajala Venkata Mahendra, Sheikh Wasmir Hussain, Anup Dandapat:
  The analogy of matchline sensing techniques for content addressable memory (CAM). IET Comput. Digit. Tech. 14(3): 87-96 (2020)
• 
  Khokan Mondal, Subhajit Das, Tuhina Samanta:
  Rectilinear routing algorithm for crosstalk minimisation in 2D and 3D IC. IET Comput. Digit. Tech. 14(6): 263-271 (2020)
• 
  Pradeepa Parthiban, Pushpalakshmi Raman:
  Multi-objective constraint and hybrid optimisation-based VM migration in a community cloud. IET Comput. Digit. Tech. 14(1): 37-45 (2020)
• 
  Vikas Pathak, Satyasai Jagannath Nanda, Amit Mahesh Joshi, Sitanshu Sekhar Sahu:
  VLSI implementation of anti-notch lattice structure for identification of exon regions in Eukaryotic genes. IET Comput. Digit. Tech. 14(5): 217-229 (2020)
• 
  Irith Pomeranz:
  LFSR-based generation of boundary-functional broadside tests. IET Comput. Digit. Tech. 14(2): 61-68 (2020)
• 
  Sreeja Rajendran, Mary Lourde Regeena:
  Sensitivity analysis of testability parameters for secure IC design. IET Comput. Digit. Tech. 14(4): 158-165 (2020)
• 
  Bahram Rashidi:
  Efficient and flexible hardware structures of the 128 bit CLEFIA block cipher. IET Comput. Digit. Tech. 14(2): 69-79 (2020)
• 
  Yasir Ali Shah, Khalid Javeed, Muhammad Imran Shehzad, Shoaib Azmat:
  LUT-based high-speed point multiplier for Goldilocks-Curve448. IET Comput. Digit. Tech. 14(4): 149-157 (2020)
• 
  Karim Shahbazi, Seok-Bum Ko:
  High throughput and area-efficient FPGA implementation of AES for high-traffic applications. IET Comput. Digit. Tech. 14(6): 344-352 (2020)
• 
  Smita Singhal, Anu Mehra, Upendra Tripathi:
  V _th and dual-T _ox assignment in 16 nm CMOS technology Design topologies with dual-V _th and dual-T _ox assignment in 16 nm CMOS technology. IET Comput. Digit. Tech. 14(4): 176-186 (2020)

skipping 7 more matches