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2020 – today
- 2023
[j5]Hamzeh Ahangari, Yusuf Ibrahim Ozkok, Asil Yildirim, Fatih Say, Funda Atik, Ozcan Ozturk:
Architecture for safety-critical transportation systems. Microprocess. Microsystems 98: 104818 (2023)- [j4]Hamzeh Ahangari, Muhammet Mustafa Ozdal, Özcan Özturk:
HLS-based High-throughput and Work-efficient Synthesizable Graph Processing Template Pipeline. ACM Trans. Embed. Comput. Syst. 22(2): 34:1-34:24 (2023) - 2020
- [b1]Hamzeh Ahangari:
Custom hardware optimizations for reliable and high performance computer architectures (Güvenilir ve yüksek performanslı bilgisayar mimarileri için özel donanım optimizasyonları). İhsan Doğramacı Bilkent University, Turkey, 2020 - [j3]Ihsen Alouani
, Hamzeh Ahangari, Ozcan Ozturk, Smaïl Niar:
Power-efficient reliable register file for aggressive-environment applications. IET Comput. Digit. Tech. 14(1): 1-8 (2020) - [j2]Hamzeh Ahangari, Funda Atik, Yusuf Ibrahim Ozkok, Asil Yildirim, Serdar Oguz Ata, Özcan Özturk:
Analysis of Design Parameters in Safety-Critical Computers. IEEE Trans. Emerg. Top. Comput. 8(3): 712-723 (2020) - [c5]Ayhan Demiriz, Hamzeh Ahangari, Ozcan Ozturk:
Temperature-Aware Core Mapping for Heterogeneous 3D NoC Design Through Constraint Programming. PDP 2020: 312-318
2010 – 2019
- 2018
- [j1]Ihsen Alouani, Hamzeh Ahangari, Ozcan Ozturk, Smaïl Niar:
A Novel Heterogeneous Approximate Multiplier for Low Power and High Performance. IEEE Embed. Syst. Lett. 10(2): 45-48 (2018) - 2017
- [c4]Hamzeh Ahangari, Ihsen Alouani, Özcan Özturk, Smaïl Niar:
Reconfigurable Hardened Latch and Flip-Flop for FPGAs. ISVLSI 2017: 433-438 - 2016
- [c3]Ihsen Alouani, Hamzeh Ahangari, Özcan Özturk, Smaïl Niar:
NS-SRAM: Neighborhood Solidarity SRAM for Reliability Enhancement of SRAM Memories. DSD 2016: 154-159 - [c2]Hamzeh Ahangari, Ihsen Alouani, Özcan Özturk, Smaïl Niar, Atika Rivenq:
Register file reliability enhancement through adjacent narrow-width exploitation. DTIS 2016: 1-4 - 2015
- [c1]Hamzeh Ahangari, Gulay Yalcin, Ozcan Ozturk, Osman S. Unsal, Adrián Cristal:
JSRAM: A Circuit-Level Technique for Trading-Off Robustness and Capacity in Cache Memories. ISVLSI 2015: 149-154
Coauthor Index
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