• case-insensitive prefix search: default
  e.g., sig matches "SIGIR" as well as "signal"
• exact word search: append dollar sign ($) to word
  e.g., graph$ matches "graph", but not "graphics"
• boolean and: separate words by space
  e.g., codd model
• boolean or: connect words by pipe symbol (|)
  e.g., graph|network

Update May 7, 2017: Please note that we had to disable the phrase search operator (.) and the boolean not operator (-) due to technical problems. For the time being, phrase search queries will yield regular prefix search result, and search terms preceded by a minus will be interpreted as regular (positive) search terms.

found 18 matches

• 1999
• 
  Gershom Birk, Duncan G. Elliott, Bruce F. Cockburn:
  A Comparative Simulation Study of Four Multilevel DRAMs. MTDT 1999: 102-109
• 
  Mark Brehob, Richard J. Enbody:
  The Potential of Carbon-Based Memory Systems. MTDT 1999: 110-114
• 
  Sue Brown, Jeff Campbell, Sherri Griffin, Dick James, Ray Haythornthwaite:
  Failure Mechanisms Detected in Memory Chips during Routine Construction Analysis. MTDT 1999: 34-39
• 
  Luke Roth, Lee D. Coraor, David L. Landis, Paul T. Hulina, Scott Deno:
  Computing in Memory Architectures for Digital Image Processing. MTDT 1999: 8-15
• 
  Larry Fenstermaker, Ilyoung Kim, Jim L. Lewandowski, Jeffrey J. Nagy:
  Built In Self Test for Ring Addressed FIFOs with Transparent Latches. MTDT 1999: 72-77
• 
  Raju Khubchandani:
  A Fast Test to Generate Flash Memory Threshold Voltage Distribution Map. MTDT 1999: 78-82
• 
  G. Jack Lipovski, Clement T. Yu:
  The Dynamic Associative Access Memory Chip and Its Application to SIMD Processing and Full-Text Database Retrieval. MTDT 1999: 24-
• 
  Doug Malone:
  Design Validation of .18 um 1 Ghz Cache and Register Arrays. MTDT 1999: 54-
• 
  Martin Margala:
  Low Power SRAMs for Battery Operation. MTDT 1999: 6-
• 
  Martin Margala:
  Low-Power SRAM Circuit Design. MTDT 1999: 115-122
• 
  Betty Prince:
  A Tribute to Graphics Drams. MTDT 1999: 123-
• 
  David L. Rhodes, Wayne H. Wolf:
  Unbalanced Cache Systems. MTDT 1999: 16-23
• 
  Julie D. Segal, Sergei Bakarian, Jonathon E. Colburn, Madan Kumar, Chang Hong, Alex Shubat:
  Determining Redundancy Requirements for Memory Arrays with Critical Area Analysis. MTDT 1999: 48-53
• 
  Piotr R. Sidorowicz:
  Modeling and Testing Transistor Faults in Content-Addressable Memories. MTDT 1999: 83-90
• 
  Daniel P. Van der Velde, Ad J. van de Goor:
  Designing a Memory Module Tester. MTDT 1999: 91-
• 
  Jörg E. Vollrath:
  Tutorial: Characterizing SDRAMS. MTDT 1999: 62-
• 
  Jun Zhao, Fred J. Meyer, Fabrizio Lombardi:
  Interconnect Diagnosis of Bus-Connected Multi-RAM Systems. MTDT 1999: 40-47
• 
  7th IEEE International Workshop on Memory Technology, Design, and Testing (MTDT '99), August 9-10, 1999, San Jose, CA, USA. IEEE Computer Society 1999, ISBN 0-7695-0259-8 [contents]