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ORCIDJörg E. Vollrath
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2010 – 2019
- 2018
[c15]Jörg E. Vollrath:
Open Access Microelectronics Course. EWME 2018: 1-4- 2015
- [c14]Jörg E. Vollrath:
An open access minimum automatic task generation live feedback system for electrical engineering. EDUCON 2015: 494-498 - 2014
- [c13]Jörg E. Vollrath:
Interactive tools for teaching electrical engineering. EDUCON 2014: 129-133 - 2013
- [c12]Jörg E. Vollrath:
Using models, simulation and measurements for teaching circuit design. EDUCON 2013: 978-983
2000 – 2009
- 2006
- [c11]Zaid Al-Ars, Said Hamdioui, Ad J. van de Goor, Georgi Gaydadjiev
, Jörg E. Vollrath:
DRAM-Specific Space of Memory Tests. ITC 2006: 1-10 - [c10]Jörg E. Vollrath, Jürg Schwizer, Marcin Gnat, Ralf Schneider, Bret Johnson:
DDR2 DRAM Output Timing Optimization. MTDT 2006: 49-54 - 2005
- [c9]Zaid Al-Ars, Said Hamdioui, Jörg E. Vollrath:
Investigations of Faulty DRAM Behavior Using Electrical Simulation Versus an Analytical Approach. Asian Test Symposium 2005: 434-439 - 2003
- [j2]Jörg E. Vollrath:
Testing and Characterization of SDRAMs. IEEE Des. Test Comput. 20(1): 42-50 (2003) - [c8]Jörg E. Vollrath:
Output Timing Measurement Using an Idd Method. MTDT 2003: 43-46 - 2002
- [c7]Jörg E. Vollrath:
Signal Margin Analysis for Memory Sense Amplifiers . DELTA 2002: 123-127 - 2001
- [j1]Jörg E. Vollrath, Ulf Lederer, Thomas Hladschik:
Compressed Bit Fail Maps for Memory Fail Pattern Classification. J. Electron. Test. 17(3-4): 291-297 (2001) - [c6]Jörg E. Vollrath, Randall Rooney:
Pseudo fail bit map generation for RAMs during component test and burn-in in a manufacturing environment. ITC 2001: 768-775 - 2000
- [c5]Jörg E. Vollrath, Ulf Lederer, Thomas Hladschik:
Compressed bit fail maps for memory fail pattern classification. ETW 2000: 125-130 - [c4]Jörg E. Vollrath:
Synchronous Dynamic Memory Test Construction: A Field Approach. MTDT 2000: 59-64
1990 – 1999
- 1999
- [c3]Jörg E. Vollrath:
Tutorial: Characterizing SDRAMS. MTDT 1999: 62- - 1998
- [c2]Jörg E. Vollrath, Markus Huebl, Ernst Stahl:
Power Analysis of DRAMs. Asian Test Symposium 1998: 334-339 - 1997
- [c1]Jörg E. Vollrath:
Cell Signal Measurement for High-Density DRAMs. ITC 1997: 209-216
Coauthor Index
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