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@inproceedings{DBLP:conf/mtdt/BirkEC99,
  author       = {Gershom Birk and
                  Duncan G. Elliott and
                  Bruce F. Cockburn},
  title        = {A Comparative Simulation Study of Four Multilevel DRAMs},
  booktitle    = {7th {IEEE} International Workshop on Memory Technology, Design, and
                  Testing {(MTDT} '99), August 9-10, 1999, San Jose, CA, {USA}},
  pages        = {102--109},
  publisher    = {{IEEE} Computer Society},
  year         = {1999},
  url          = {https://doi.org/10.1109/MTDT.1999.782690},
  doi          = {10.1109/MTDT.1999.782690},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/mtdt/BirkEC99.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/mtdt/BrehobE99,
  author       = {Mark Brehob and
                  Richard J. Enbody},
  title        = {The Potential of Carbon-Based Memory Systems},
  booktitle    = {7th {IEEE} International Workshop on Memory Technology, Design, and
                  Testing {(MTDT} '99), August 9-10, 1999, San Jose, CA, {USA}},
  pages        = {110--114},
  publisher    = {{IEEE} Computer Society},
  year         = {1999},
  url          = {https://doi.org/10.1109/MTDT.1999.782691},
  doi          = {10.1109/MTDT.1999.782691},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/mtdt/BrehobE99.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/mtdt/BrownCGJH99,
  author       = {Sue Brown and
                  Jeff Campbell and
                  Sherri Griffin and
                  Dick James and
                  Ray Haythornthwaite},
  title        = {Failure Mechanisms Detected in Memory Chips during Routine Construction
                  Analysis},
  booktitle    = {7th {IEEE} International Workshop on Memory Technology, Design, and
                  Testing {(MTDT} '99), August 9-10, 1999, San Jose, CA, {USA}},
  pages        = {34--39},
  publisher    = {{IEEE} Computer Society},
  year         = {1999},
  url          = {https://doi.org/10.1109/MTDT.1999.782681},
  doi          = {10.1109/MTDT.1999.782681},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/mtdt/BrownCGJH99.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/mtdt/CoraorLHD99,
  author       = {Luke Roth and
                  Lee D. Coraor and
                  David L. Landis and
                  Paul T. Hulina and
                  Scott Deno},
  title        = {Computing in Memory Architectures for Digital Image Processing},
  booktitle    = {7th {IEEE} International Workshop on Memory Technology, Design, and
                  Testing {(MTDT} '99), August 9-10, 1999, San Jose, CA, {USA}},
  pages        = {8--15},
  publisher    = {{IEEE} Computer Society},
  year         = {1999},
  url          = {https://doi.org/10.1109/MTDT.1999.782678},
  doi          = {10.1109/MTDT.1999.782678},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/mtdt/CoraorLHD99.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/mtdt/FenstermakerKLN99,
  author       = {Larry Fenstermaker and
                  Ilyoung Kim and
                  Jim L. Lewandowski and
                  Jeffrey J. Nagy},
  title        = {Built In Self Test for Ring Addressed FIFOs with Transparent Latches},
  booktitle    = {7th {IEEE} International Workshop on Memory Technology, Design, and
                  Testing {(MTDT} '99), August 9-10, 1999, San Jose, CA, {USA}},
  pages        = {72--77},
  publisher    = {{IEEE} Computer Society},
  year         = {1999},
  url          = {https://doi.org/10.1109/MTDT.1999.782686},
  doi          = {10.1109/MTDT.1999.782686},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/mtdt/FenstermakerKLN99.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/mtdt/Khubchandani99,
  author       = {Raju Khubchandani},
  title        = {A Fast Test to Generate Flash Memory Threshold Voltage Distribution
                  Map},
  booktitle    = {7th {IEEE} International Workshop on Memory Technology, Design, and
                  Testing {(MTDT} '99), August 9-10, 1999, San Jose, CA, {USA}},
  pages        = {78--82},
  publisher    = {{IEEE} Computer Society},
  year         = {1999},
  url          = {https://doi.org/10.1109/MTDT.1999.782687},
  doi          = {10.1109/MTDT.1999.782687},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/mtdt/Khubchandani99.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/mtdt/LipovskiY99,
  author       = {G. Jack Lipovski and
                  Clement T. Yu},
  title        = {The Dynamic Associative Access Memory Chip and Its Application to
                  {SIMD} Processing and Full-Text Database Retrieval},
  booktitle    = {7th {IEEE} International Workshop on Memory Technology, Design, and
                  Testing {(MTDT} '99), August 9-10, 1999, San Jose, CA, {USA}},
  pages        = {24},
  publisher    = {{IEEE} Computer Society},
  year         = {1999},
  url          = {https://doi.org/10.1109/MTDT.1999.782680},
  doi          = {10.1109/MTDT.1999.782680},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/mtdt/LipovskiY99.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/mtdt/Malone99,
  author       = {Doug Malone},
  title        = {Design Validation of .18 um 1 Ghz Cache and Register Arrays},
  booktitle    = {7th {IEEE} International Workshop on Memory Technology, Design, and
                  Testing {(MTDT} '99), August 9-10, 1999, San Jose, CA, {USA}},
  pages        = {54},
  publisher    = {{IEEE} Computer Society},
  year         = {1999},
  url          = {https://doi.org/10.1109/MTDT.1999.782684},
  doi          = {10.1109/MTDT.1999.782684},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/mtdt/Malone99.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/mtdt/Margala99,
  author       = {Martin Margala},
  title        = {Low Power SRAMs for Battery Operation},
  booktitle    = {7th {IEEE} International Workshop on Memory Technology, Design, and
                  Testing {(MTDT} '99), August 9-10, 1999, San Jose, CA, {USA}},
  pages        = {6},
  publisher    = {{IEEE} Computer Society},
  year         = {1999},
  url          = {https://doi.ieeecomputersociety.org/10.1109/MTDT.1999.10000},
  doi          = {10.1109/MTDT.1999.10000},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/mtdt/Margala99.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/mtdt/Margala99a,
  author       = {Martin Margala},
  title        = {Low-Power {SRAM} Circuit Design},
  booktitle    = {7th {IEEE} International Workshop on Memory Technology, Design, and
                  Testing {(MTDT} '99), August 9-10, 1999, San Jose, CA, {USA}},
  pages        = {115--122},
  publisher    = {{IEEE} Computer Society},
  year         = {1999},
  url          = {https://doi.org/10.1109/MTDT.1999.782692},
  doi          = {10.1109/MTDT.1999.782692},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/mtdt/Margala99a.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/mtdt/Prince99,
  author       = {Betty Prince},
  title        = {A Tribute to Graphics Drams},
  booktitle    = {7th {IEEE} International Workshop on Memory Technology, Design, and
                  Testing {(MTDT} '99), August 9-10, 1999, San Jose, CA, {USA}},
  pages        = {123},
  publisher    = {{IEEE} Computer Society},
  year         = {1999},
  url          = {https://doi.org/10.1109/MTDT.1999.782693},
  doi          = {10.1109/MTDT.1999.782693},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/mtdt/Prince99.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/mtdt/RhodesW99,
  author       = {David L. Rhodes and
                  Wayne H. Wolf},
  title        = {Unbalanced Cache Systems},
  booktitle    = {7th {IEEE} International Workshop on Memory Technology, Design, and
                  Testing {(MTDT} '99), August 9-10, 1999, San Jose, CA, {USA}},
  pages        = {16--23},
  publisher    = {{IEEE} Computer Society},
  year         = {1999},
  url          = {https://doi.org/10.1109/MTDT.1999.782679},
  doi          = {10.1109/MTDT.1999.782679},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/mtdt/RhodesW99.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/mtdt/SegalBCKHS99,
  author       = {Julie D. Segal and
                  Sergei Bakarian and
                  Jonathon E. Colburn and
                  Madan Kumar and
                  Chang Hong and
                  Alex Shubat},
  title        = {Determining Redundancy Requirements for Memory Arrays with Critical
                  Area Analysis},
  booktitle    = {7th {IEEE} International Workshop on Memory Technology, Design, and
                  Testing {(MTDT} '99), August 9-10, 1999, San Jose, CA, {USA}},
  pages        = {48--53},
  publisher    = {{IEEE} Computer Society},
  year         = {1999},
  url          = {https://doi.org/10.1109/MTDT.1999.782683},
  doi          = {10.1109/MTDT.1999.782683},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/mtdt/SegalBCKHS99.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/mtdt/Sidorowicz99,
  author       = {Piotr R. Sidorowicz},
  title        = {Modeling and Testing Transistor Faults in Content-Addressable Memories},
  booktitle    = {7th {IEEE} International Workshop on Memory Technology, Design, and
                  Testing {(MTDT} '99), August 9-10, 1999, San Jose, CA, {USA}},
  pages        = {83--90},
  publisher    = {{IEEE} Computer Society},
  year         = {1999},
  url          = {https://doi.org/10.1109/MTDT.1999.782688},
  doi          = {10.1109/MTDT.1999.782688},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/mtdt/Sidorowicz99.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/mtdt/VeldeG99,
  author       = {Daniel P. Van der Velde and
                  Ad J. van de Goor},
  title        = {Designing a Memory Module Tester},
  booktitle    = {7th {IEEE} International Workshop on Memory Technology, Design, and
                  Testing {(MTDT} '99), August 9-10, 1999, San Jose, CA, {USA}},
  pages        = {91},
  publisher    = {{IEEE} Computer Society},
  year         = {1999},
  url          = {https://doi.org/10.1109/MTDT.1999.782689},
  doi          = {10.1109/MTDT.1999.782689},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/mtdt/VeldeG99.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/mtdt/Vollrath99,
  author       = {J{\"{o}}rg E. Vollrath},
  title        = {Tutorial: Characterizing {SDRAMS}},
  booktitle    = {7th {IEEE} International Workshop on Memory Technology, Design, and
                  Testing {(MTDT} '99), August 9-10, 1999, San Jose, CA, {USA}},
  pages        = {62},
  publisher    = {{IEEE} Computer Society},
  year         = {1999},
  url          = {https://doi.org/10.1109/MTDT.1999.782685},
  doi          = {10.1109/MTDT.1999.782685},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/mtdt/Vollrath99.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/mtdt/ZhaoML99,
  author       = {Jun Zhao and
                  Fred J. Meyer and
                  Fabrizio Lombardi},
  title        = {Interconnect Diagnosis of Bus-Connected Multi-RAM Systems},
  booktitle    = {7th {IEEE} International Workshop on Memory Technology, Design, and
                  Testing {(MTDT} '99), August 9-10, 1999, San Jose, CA, {USA}},
  pages        = {40--47},
  publisher    = {{IEEE} Computer Society},
  year         = {1999},
  url          = {https://doi.org/10.1109/MTDT.1999.782682},
  doi          = {10.1109/MTDT.1999.782682},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/mtdt/ZhaoML99.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@proceedings{DBLP:conf/mtdt/1999,
  title        = {7th {IEEE} International Workshop on Memory Technology, Design, and
                  Testing {(MTDT} '99), August 9-10, 1999, San Jose, CA, {USA}},
  publisher    = {{IEEE} Computer Society},
  year         = {1999},
  url          = {https://ieeexplore.ieee.org/xpl/conhome/6351/proceeding},
  isbn         = {0-7695-0259-8},
  timestamp    = {Wed, 16 Oct 2019 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/mtdt/1999.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

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