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Publication search results
found 26 matches
- 2002
- Anil Bahuman, Benjamin Bishop, Khaled Rasheed:
Automated Synthesis of Standard Cells using Genetic Algorithms. ISVLSI 2002: 141-150 - Jerry W. Bruce, Mitchell A. Thornton, L. Shivakumaraiah, P. S. Kokate, X. Li:
Efficient Adder Circuits Based on a Conservative Reversible Logic Gate. ISVLSI 2002: 83-88 - Vikas Chandra, Herman Schmit:
Simultaneous Optimization of Driving Buffer and Routing Switch Sizes in an FPGA using an Iso-Area Approach. ISVLSI 2002: 35-40 - Henry Y. H. Chuang, David P. Birch, Li-Chang Liu, Jong-Chih Chien, Steven P. Levitan, Ching-Chung Li:
A High Speed Shift-Invariant Wavelet Transform Chip for Video Compression. ISVLSI 2002: 125-134 - Srdjan Dragic, Martin Margala:
A 1.2V Built-In Architecture for High Frequency On-Line Iddq/delta Iddq Test. ISVLSI 2002: 165-170 - David Duarte, Narayanan Vijaykrishnan, Mary Jane Irwin:
Impact of Technology Scaling in the Clock System Power. ISVLSI 2002: 59-64 - Mohamed A. Elgamel, Tarek Darwish, Magdy A. Bayoumi:
Noise Tolerant Low Power Dynamic TSPCL D Flip-Flops. ISVLSI 2002: 89-94 - Suvodeep Gupta, Srinivas Katkoori:
Force-Directed Scheduling for Dynamic Power Optimization. ISVLSI 2002: 75-82 - Adnan Abdul-Aziz Gutub, Alexandre F. Tenca, Çetin Kaya Koç:
Scalable VLSI Architecture for GF(p) Montgomery Modular Inverse Computation. ISVLSI 2002: 53-58 - Shiuh-Rong Huang, Lan-Rong Dung:
VLSI Implementation for MAC-Level DWT Architecture. ISVLSI 2002: 101-106 - Seong-Ook Jung, Ki-Wook Kim, Sung-Mo Kang:
Optimal Timing for Skew-Tolerant High-Speed Domino Logic. ISVLSI 2002: 41-46 - Ismail Kadayif, Mahmut T. Kandemir, Narayanan Vijaykrishnan, Mary Jane Irwin:
Hardware-Software Co-Adaptation for Data-Intensive Embedded Applications. ISVLSI 2002: 20-25 - Shashi Kumar, Axel Jantsch, Mikael Millberg, Johnny Öberg, Juha-Pekka Soininen, Martti Forsell, Kari Tiensyrjä, Ahmed Hemani:
A Network on Chip Architecture and Design Methodology. ISVLSI 2002: 117-124 - Saraju P. Mohanty, N. Ranganathan, Vamsi Krishna:
Datapath Scheduling using Dynamic Frequency Clocking. ISVLSI 2002: 65-70 - Ingmar Neumann, Kolja Sulimma, Wolfgang Kunz:
Accelerating Retiming Under the Coupled-Edge Timing Model. ISVLSI 2002: 135-140 - Naotaka Ohsawa, Masanori Hariyama, Michitaka Kameyama:
High-Performance Field Programmable VLSI Processor Based on a Direct Allocation of a Control/Data Flow Graph. ISVLSI 2002: 95-100 - Bassam Shaer, Khaled Dib:
An Efficient Partitioning Algorithm of Combinational CMOS Circuits. ISVLSI 2002: 159-164 - Kaveh Shakeri, James D. Meindl:
Temperature Variable Supply Voltage for Power Reduction. ISVLSI 2002: 71-74 - Ahmed M. Shams, Wendi Pan, Archana Chidanandan, Magdy A. Bayoumi:
A Low Power High Performance Distributed DCT Architecture. ISVLSI 2002: 26-34 - Asim Smailagic, Matthew Ettus:
System Design and Power Optimization for Mobile Computers. ISVLSI 2002: 15-19 - Scott C. Smith:
Speedup of Self-Timed Digital Systems Using Early Completion. ISVLSI 2002: 107-116 - Mitchell A. Thornton, Rolf Drechsler, D. Michael Miller:
Multi-Output Timed Shannon Circuits. ISVLSI 2002: 47-52 - Alice Wang, Anantha P. Chandrakasan, Stephen V. Kosonocky:
Optimal Supply and Threshold Scaling for Subthreshold CMOS Circuits. ISVLSI 2002: 7-14 - Markus Wedler, Dominik Stoffel, Wolfgang Kunz:
Improving Structural FSM Traversal by Constraint-Satisfying Logic Simulation. ISVLSI 2002: 151-158 - Wayne H. Wolf, I. Burak Özer, Tiehan Lv:
VLSI Systems for Embedded Video. ISVLSI 2002: 3-6 - 2002 IEEE Computer Society Annual Symposium on VLSI (ISVLSI 2002), 25-26 April 2002, Pittsburgh, PA, USA. IEEE Computer Society 2002, ISBN 0-7695-1486-3 [contents]
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retrieved on 2025-01-18 12:27 CET from data curated by the dblp team
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