"A 1.2V Built-In Architecture for High Frequency On-Line Iddq/delta Iddq Test."

Srdjan Dragic, Martin Margala (2002)

> Home

Details and statistics

DOI: 10.1109/ISVLSI.2002.1016891

access: closed

type: Conference or Workshop Paper

metadata version: 2023-03-24

- view
  authority control:
- export record
  dblp key:
  - conf/isvlsi/DragicM02
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/conf/isvlsi/DragicM02
Srdjan Dragic, Martin Margala:
A 1.2V Built-In Architecture for High Frequency On-Line Iddq/delta Iddq Test. ISVLSI 2002: 165-170

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.