- 2002
- Yazdan Aghaghiri, Farzan Fallah, Massoud Pedram:
A Class of Irredundant Encoding Techniques for Reducing Bus Power. J. Circuits Syst. Comput. 11(5): 445-458 (2002) - Peter H. Bauer, Mihail L. Sichitiu
, Kamal Premaratne:
Queue Control Under Time-Variant Delays: A Discrete Time System Approach. J. Circuits Syst. Comput. 11(2): 187- (2002) - David T. Blaauw, Steven M. Martin, Trevor N. Mudge, Krisztián Flautner:
Leakage Current Reduction in VLSI Systems. J. Circuits Syst. Comput. 11(6): 621-636 (2002) - Carlo Brandolese, William Fornaciari, Fabio Salice, Donatella Sciuto:
The Impact of Source Code Transformations on Software Power and Energy Consumption. J. Circuits Syst. Comput. 11(5): 477-502 (2002) - George Cai, Ashutosh S. Dhodapkar, James E. Smith:
Integrated Performance, Power, and Thermal Modeling. J. Circuits Syst. Comput. 11(6): 659- (2002) - Robert C. Chang, L.-C. Hsu, M.-C. Sun:
A Low-Power and High-Speed D Flip-Flop Using a Single Latch. J. Circuits Syst. Comput. 11(1): 51-56 (2002) - Guangyu Chen, Mahmut T. Kandemir, Narayanan Vijaykrishnan, Mary Jane Irwin, Wayne H. Wolf:
Using Memory Compression for Energy Reduction in an Embedded Java System. J. Circuits Syst. Comput. 11(5): 537-556 (2002) - Cheng-Hsien Chen, Chen-Yi Lee:
Reduce the Memory Bandwidth of 3D Graphics Hardware with a Novel Rasterizer. J. Circuits Syst. Comput. 11(4): 377-392 (2002) - Wei-Chung Cheng, Massoud Pedram:
Power-Aware Bus Encoding Techniques for I/O and Data Buses in an Embedded System. J. Circuits Syst. Comput. 11(4): 351-364 (2002) - Yoonseo Choi, Taewhan Kim:
Binding Algorithm for Power Optimization Based on Network Flow Method. J. Circuits Syst. Comput. 11(3): 259-272 (2002) - Ki-Seok Chung, Taewhan Kim, C. L. Liu:
A Complete Model for Glitch Analysis in Logic Circuits. J. Circuits Syst. Comput. 11(2): 137-154 (2002) - Tibor Csöndes, Balázs Kotnyek:
Greedy Algorithms for the Test Selection Problem in Protocol Conformance Testing. J. Circuits Syst. Comput. 11(3): 273-282 (2002) - Giuseppe Grassi, Saverio Mascolo:
A Systematic Procedure for Synchronizing Hyperchaos Via Observer Design. J. Circuits Syst. Comput. 11(1): 1-16 (2002) - Jiun-In Guo, Chien-Chang Lin, Chih-Da Chien:
A Low-Power Parameterized Hardware Design for the One-Dimensional Discrete Fourier Transform of Variable Lengths. J. Circuits Syst. Comput. 11(4): 405-428 (2002) - Javad Haddadnia, Karim Faez, Majid Ahmadi:
A Neural Based Human Face Recognition System Using an Efficient Feature Extraction Method with Pseudo Zernike Moment. J. Circuits Syst. Comput. 11(3): 283-304 (2002) - Zheng-Xin Hou, Wenquan Wang, Jinghui Chu:
A Kind of 2D Isotropic Wavelet and Its Application in Image Primitive Detection. J. Circuits Syst. Comput. 11(2): 123- (2002) - Heng-Liang Huang, Jing-Yang Jou:
Bootstrap Monte Carlo with Adaptive Stratification for Power Estimation. J. Circuits Syst. Comput. 11(4): 333-350 (2002) - Yehea I. Ismail, Eby G. Friedman, José Luis Neves:
Inductance Effects in RLC Trees. J. Circuits Syst. Comput. 11(3): 305- (2002) - Hongrui Jiang, Kyung Sup Kwak:
On Modified Complex Recurrent Neural Network Adaptive Equalizer. J. Circuits Syst. Comput. 11(1): 93- (2002) - Hirotaka Koizumi, Iwao Sasase, Shinsaku Mori:
Analysis of Class D-E Resonant dc/dc Converter Using Thinned-Out Method. J. Circuits Syst. Comput. 11(1): 35-50 (2002) - J. Lee, Khaled Hayatleh, F. J. Lidgey, J. Drew:
Linear Bi-CMOS Transconductance for Gm-C Filter Applications. J. Circuits Syst. Comput. 11(3): 219-230 (2002) - Seongsoo Lee, Seungjun Lee, Takayasu Sakurai:
Energy-Constrained VDD Hopping Scheme with Run-Time Power Estimation for Low-Power Real-Time VLSI Systems. J. Circuits Syst. Comput. 11(6): 601-620 (2002) - Torsten Lehmann, Marco Cassia:
1 V OTA Using Current Driven Bulk Circuits. J. Circuits Syst. Comput. 11(1): 81-92 (2002) - Hongchin Lin, Nai-Hsien Chen, Jainhao Lu:
Design of Modified Four-Phase CMOS Charge Pumps for Low-Voltage Flash Memories. J. Circuits Syst. Comput. 11(4): 393-404 (2002) - Chih-Wen Lu:
Low-Power High-Speed Class-AB Buffer Amplifiers for Liquid-Crystal Display Signal Driver Application. J. Circuits Syst. Comput. 11(4): 427- (2002) - Paul Marchal, Murali Jayapala, Samuel Xavier de Souza, Peng Yang, Francky Catthoor, Geert Deconinck:
Matador: An Exploration Environment for System-Design. J. Circuits Syst. Comput. 11(5): 503-536 (2002) - Radu Marculescu:
Guest Editorial: Power Modeling, Estimation and Optimization in VLSI Systems. J. Circuits Syst. Comput. 11(6) (2002) - Yoshimasa Negishi, Eiji Watanabe, Akinori Nishihara:
An Implementation of Lattice Filters Using Four Operands Real Multiply Accumulation. J. Circuits Syst. Comput. 11(2): 115-122 (2002) - Aristodemos Pnevmatikakis, Lampros Dermentzoglou, Aggeliki Arapoyanni:
Analog-to-Digital Interface for Heterodyne Receivers. J. Circuits Syst. Comput. 11(1): 57-72 (2002) - Gang Qu, Naoyuki Kawabe, Kimiyoshi Usami, Miodrag Potkonjak:
Code Coverage-Based Power Estimation Techniques for Microprocessors. J. Circuits Syst. Comput. 11(5): 557- (2002)
