- 2011
- Nikolaos Alachiotis
, Alexandros Stamatakis:
FPGA Optimizations for a Pipelined Floating-Point Exponential Unit. ARC 2011: 316-327 - Christophe Alias, Bogdan Pasca, Alexandru Plesco:
Automatic Generation of FPGA-Specific Pipelined Accelerators. ARC 2011: 53-66 - Francisco Barranco, Matteo Tomasi, Javier Díaz, Eduardo Ros:
Hierarchical Optical Flow Estimation Architecture Using Color Cues. ARC 2011: 269-274 - Samuel Bayliss, George A. Constantinides:
Application Specific Memory Access, Reuse and Reordering for SDRAM. ARC 2011: 41-52 - Alexander Biedermann, Marc Stöttinger, Lijing Chen, Sorin A. Huss:
Secure Virtualization within a Multi-processor Soft-Core System-on-Chip Architecture. ARC 2011: 385-396 - Gordon J. Brebner:
Reconfigurable Computing for High Performance Networking Applications. ARC 2011: 1 - Jon T. Butler, Tsutomu Sasao:
Index to Constant Weight Codeword Converter. ARC 2011: 193-205 - Xuezheng Chu, John McAllister, Roger F. Woods:
A Pipeline Interleaved Heterogeneous SIMD Soft Processor Array Architecture for MIMO-OFDM Detection. ARC 2011: 133-144 - Alexandre Cornu, Steven Derrien, Dominique Lavenier:
HLS Tools for FPGA: Faster Development with Better Performance. ARC 2011: 67-78 - Kevin Cunningham, Prawat Nagvajara:
Reconfigurable Stream-Processing Architecture for Sparse Linear Solvers. ARC 2011: 281-286 - Subhasis Das, Sachin Patkar:
A Compact Gaussian Random Number Generator for Small Word Lengths. ARC 2011: 88-93 - François Duhem, Fabrice Muller, Philippe Lorenzini:
FaRM: Fast Reconfiguration Manager for Reducing Reconfiguration Time Overhead on FPGA. ARC 2011: 253-260 - Andreas Engel, Björn Liebig, Andreas Koch:
Feasibility Analysis of Reconfigurable Computing in Low-Power Wireless Sensor Applications. ARC 2011: 261-268 - Umer Farooq, Husain Parvez, Zied Marrakchi, Habib Mehrez:
Comparison between Heterogeneous Mesh-Based and Tree-Based Application Specific FPGA. ARC 2011: 218-229 - Steve B. Furber:
Biologically-Inspired Massively-Parallel Architectures: A Reconfigurable Neural Modelling Platform. ARC 2011: 2 - Michael Grand, Lilian Bossuet, Bertrand Le Gal, Guy Gogniat, Dominique Dallet:
Design and Implementation of a Multi-Core Crypto-Processor for Software Defined Radios. ARC 2011: 29-40 - Mario Alberto Ibarra-Manzano, Dora Luz Almanza-Ojeda:
An FPGA Implementation for Texture Analysis Considering the Real-Time Requirements of Vision-Based Systems. ARC 2011: 110-117 - Xabier Iturbe, Khaled Benkrid, Tughrul Arslan, Mikel Azkarate-askasua, Imanol Martinez:
A (Fault-Tolerant)2 Scheduler for Real-Time HW Tasks. ARC 2011: 79-87 - Jair Fajardo Junior, Mateus B. Rutzig, Antonio Carlos Schneider Beck, Luigi Carro:
Towards an Adaptable Multiple-ISA Reconfigurable Processor. ARC 2011: 157-168 - Ratna Krishnamoorthy, Keshavan Varadarajan, Masahiro Fujita, Mythri Alle, S. K. Nandy, Ranjani Narayan:
Dataflow Graph Partitioning for Optimal Spatio-Temporal Computation on a Coarse Grain Reconfigurable Architecture. ARC 2011: 125-132 - Yahya Lakys, Weisheng Zhao, Jacques-Olivier Klein, Claude Chappert:
Magnetic Look-Up Table (MLUT) Featuring Radiation Hardness, High Performance and Low Power. ARC 2011: 275-280 - Christophe Le Lann, David Boland, George A. Constantinides:
The Krawczyk Algorithm: Rigorous Bounds for Linear Equation Solution on an FPGA. ARC 2011: 287-295 - Ming Liu, Zhonghai Lu, Wolfgang Kuehn, Axel Jantsch:
FPGA-Based Cherenkov Ring Recognition in Nuclear and Particle Physics Experiments. ARC 2011: 169-180 - Manouk V. Manoukian, George A. Constantinides:
Accurate Floating Point Arithmetic through Hardware Error-Free Transformations. ARC 2011: 94-101 - Séamas McGettrick, Kunjan Patel, Chris J. Bleakley:
High Performance Programmable FPGA Overlay for Digital Signal Processing. ARC 2011: 375-384 - Hironobu Morita, Minoru Watanabe:
MEMS Interleaving Read Operation of a Holographic Memory for Optically Reconfigurable Gate Arrays. ARC 2011: 242-252 - Sascha Mühlbach, Andreas Koch:
NetStage/DPR: A Self-adaptable FPGA Platform for Application-Level Network Security. ARC 2011: 328-339 - Hiroki Nakahara, Tsutomu Sasao, Munehiro Matsuura:
A Regular Expression Matching Circuit Based on a Decomposed Automaton. ARC 2011: 16-28 - Weibo Pan, William P. Marnane:
A Correlation Power Analysis Attack against Tate Pairing on FPGA. ARC 2011: 340-349 - Mateus B. Rutzig, Antonio Carlos Schneider Beck, Luigi Carro:
CReAMS: An Embedded Multiprocessor Platform. ARC 2011: 118-124
