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ORCIDViolante Moschiano
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2020 – today
- 2022
[c6]Ted Pekny, Luyen Vu, Jeff Tsai, Dheeraj Srinivasan, Erwin Yu, Jonathan Pabustan, Joe Xu, Srinivas Deshmukh, Kim-Fung Chan, Michael Piccardi, Kevin Xu, Guan Wang, Kaveh Shakeri, Vipul Patel, Tomoko Iwasaki, Tongji Wang, Padma Musunuri, Carl Gu, Ali Mohammadzadeh, Ali Ghalam, Violante Moschiano, Tommaso Vali, Jae-Kwan Park, June Lee, Ramin Ghodsi:
A 1-Tb Density 4b/Cell 3D-NAND Flash on 176-Tier Technology with 4-Independent Planes for Read using CMOS-Under-the-Array. ISSCC 2022: 1-3- 2021
- [c5]Yasuhiko Taito, Violante Moschiano, Shinichiro Shiratake:
Session 30 Overview: Non-Volatile Memories Memory Subcommittee. ISSCC 2021: 420-421
2010 – 2019
- 2016
- [c4]Tomoharu Tanaka, Mark Helm, Tommaso Vali, Ramin Ghodsi, Koichi Kawai, Jae-Kwan Park, Shigekazu Yamada, Feng Pan, Yuichi Einaga, Ali Ghalam, Toru Tanzawa
, Jason Guo, Takaaki Ichikawa, Erwin Yu, Satoru Tamada, Tetsuji Manabe, Jiro Kishimoto, Yoko Oikawa, Yasuhiro Takashima, Hidehiko Kuge, Midori Morooka, Ali Mohammadzadeh, Jong Kang, Jeff Tsai, Emanuele Sirizotti, Eric Lee, Luyen Vu, Yuxing Liu, Hoon Choi, Kwonsu Cheon, Daesik Song, Daniel Shin, Jung Hee Yun, Michele Piccardi, Kim-Fung Chan, Yogesh Luthra, Dheeraj Srinivasan, Srinivasarao Deshmukh, Kalyan Kavalipurapu, Dan Nguyen, Girolamo Gallo, Sumant Ramprasad, Michelle Luo, Qiang Tang, Michele Incarnati, Agostino Macerola, Luigi Pilolli, Luca De Santis, Massimo Rossini, Violante Moschiano, Giovanni Santin, Bernardino Tronca, Hyunseok Lee, Vipul Patel, Ted Pekny, Aaron Yip, Naveen Prabhu, Purval Sule, Trupti Bemalkhedkar, Kiranmayee Upadhyayula, Camila Jaramillo:
7.7 A 768Gb 3b/cell 3D-floating-gate NAND flash memory. ISSCC 2016: 142-144 - 2014
- [c3]Mark Helm, Jae-Kwan Park, Ali Ghalam, Jason Guo, Chang-Wan Ha, Cairong Hu, Heonwook Kim, Kalyan Kavalipurapu, Eric Lee, Ali Mohammadzadeh, Dan Nguyen, Vipul Patel, Ted Pekny, Bill Saiki, Daesik Song, Jeff Tsai, Vimon Viajedor, Luyen Vu, Tinwai Wong, Jung Hee Yun, Ramin Ghodsi, Andrea D'Alessandro, Domenico Di Cicco, Violante Moschiano:
19.1 A 128Gb MLC NAND-Flash device using 16nm planar cell. ISSCC 2014: 326-327 - 2013
- [c2]Giovanni Naso, L. Botticchio, M. Castelli, C. Cerafogli, M. Cichocki, P. Conenna, Andrea D'Alessandro, Luca De Santis, Domenico Di Cicco, W. Di Francesco, M. L. Gallese, Girolamo Gallo, Michele Incarnati, C. Lattaro, Agostino Macerola, G. G. Marotta, Violante Moschiano, D. Orlandi, F. Paolini, S. Perugini, Luigi Pilolli, P. Pistilli, G. Rizzo, F. Rori, Massimo Rossini, Giovanni Santin, Emanuele Sirizotti, A. Smaniotto, U. Siciliani, Marco Tiburzi, R. Meyer, A. Goda, B. Filipiak, Tommaso Vali, Mark Helm, Ramin Ghodsi:
A 128Gb 3b/cell NAND flash design using 20nm planar-cell technology. ISSCC 2013: 218-219 - 2010
- [c1]G. G. Marotta, Agostino Macerola, Andrea D'Alessandro, A. Torsi, C. Cerafogli, C. Lattaro, C. Musilli, D. Rivers, Emanuele Sirizotti, F. Paolini, G. Imondi, G. Naso, Giovanni Santin, L. Botticchio, Luca De Santis, Luigi Pilolli, M. L. Gallese, Michele Incarnati, Marco Tiburzi, P. Conenna, S. Perugini, Violante Moschiano, W. Di Francesco, Matt Goldman, Chris Haid, Domenico Di Cicco, D. Orlandi, F. Rori, Massimo Rossini, Tommaso Vali, Ramin Ghodsi, Frank Roohparvar:
A 3bit/cell 32Gb NAND flash memory at 34nm with 6MB/s program throughput and with dynamic 2b/cell blocks configuration mode for a program throughput increase up to 13MB/s. ISSCC 2010: 444-445
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