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Journal Articles
- 2022
[j16]Mozhgan Mansuri
, Rajesh Inti, Joe Kennedy, Junyi Qiu, Chun-Ming Hsu, Jahnavi Sharma, Hao Li, Bryan Casper, James E. Jaussi:
A Scalable 32-56 Gb/s 0.56-1.28 pJ/b Voltage-Mode VCSEL-Based Optical Transmitter in 28-nm CMOS. IEEE J. Solid State Circuits 57(3): 757-766 (2022)- 2021
- [j15]Hao Li, Ganesh Balamurugan, Taehwan Kim, Meer Sakib, Ranjeet Kumar, Haisheng Rong, James E. Jaussi, Bryan Casper:
A 3-D-Integrated Silicon Photonic Microring-Based 112-Gb/s PAM-4 Transmitter With Nonlinear Equalization and Thermal Control. IEEE J. Solid State Circuits 56(1): 19-29 (2021) - 2019
- [j14]Sudip Shekhar, Rajesh Inti, James E. Jaussi, Tzu-Chien Hsueh, Bryan Casper:
A Low-Power Bidirectional Link With a Direct Data-Sequencing Blind Oversampling CDR. IEEE J. Solid State Circuits 54(6): 1669-1681 (2019) - [j13]Chintan Thakkar, Anandaroop Chakrabarti, Shuhei Yamada, Debabani Choudhury, James E. Jaussi, Bryan Casper:
A 42.2-Gb/s 4.3-pJ/b 60-GHz Digital Transmitter With 12-b/Symbol Polarization MIMO. IEEE J. Solid State Circuits 54(12): 3565-3576 (2019) - 2018
- [j12]Kaushik Dasgupta, Saeid Daneshgar, Chintan Thakkar, Shinwon Kang, Anandaroop Chakrabarti, Shuhei Yamada, Nathan Narevsky, Debabani Choudhury, James E. Jaussi, Bryan Casper:
A 60-GHz Transceiver and Baseband With Polarization MIMO in 28-nm CMOS. IEEE J. Solid State Circuits 53(12): 3613-3627 (2018) - 2016
- [j11]Chintan Thakkar, Shreyas Sen, James E. Jaussi, Bryan Casper:
A 32 Gb/s Bidirectional 4-channel 4 pJ/b Capacitively Coupled Link in 14 nm CMOS for Proximity Communication. IEEE J. Solid State Circuits 51(12): 3231-3245 (2016) - 2015
- [j10]Tzu-Chien Hsueh, Frank O'Mahony, Mozhgan Mansuri, Bryan Casper:
An On-Die All-Digital Power Supply Noise Analyzer With Enhanced Spectrum Measurements. IEEE J. Solid State Circuits 50(7): 1711-1721 (2015) - 2014
- [j9]Tawfiq Musah, James E. Jaussi, Ganesh Balamurugan, Sami Hyvonen, Tzu-Chien Hsueh, Gokce Keskin, Sudip Shekhar, Joseph T. Kennedy, Shreyas Sen, Rajesh Inti, Mozhgan Mansuri, Michael Leddige, Bryce Horine, Clark Roberts, Randy Mooney, Bryan Casper:
A 4-32 Gb/s Bidirectional Link With 3-Tap FFE/6-Tap DFE and Collaborative CDR in 22 nm CMOS. IEEE J. Solid State Circuits 49(12): 3079-3090 (2014) - 2013
- [j8]Mozhgan Mansuri, James E. Jaussi, Joseph T. Kennedy, Tzu-Chien Hsueh, Sudip Shekhar, Ganesh Balamurugan, Frank O'Mahony, Clark Roberts, Randy Mooney, Bryan Casper:
A Scalable 0.128-1 Tb/s, 0.8-2.6 pJ/bit, 64-Lane Parallel I/O in 32-nm CMOS. IEEE J. Solid State Circuits 48(12): 3229-3242 (2013) - 2010
- [j7]Frank O'Mahony, James E. Jaussi, Joseph T. Kennedy, Ganesh Balamurugan, Mozhgan Mansuri, Clark Roberts, Sudip Shekhar, Randy Mooney, Bryan Casper:
A 47 , ˟, 10 Gb/s 1.4 mW/Gb/s Parallel Interface in 45 nm CMOS. IEEE J. Solid State Circuits 45(12): 2828-2837 (2010) - 2009
- [j6]Bryan Casper, Frank O'Mahony:
Clocking Analysis, Implementation and Measurement Techniques for High-Speed Data Links - A Tutorial. IEEE Trans. Circuits Syst. I Regul. Pap. 56-I(1): 17-39 (2009) - [j5]Sudip Shekhar, Ganesh Balamurugan, David J. Allstot, Mozhgan Mansuri, James E. Jaussi, Randy Mooney, Joseph T. Kennedy, Bryan Casper, Frank O'Mahony:
Strong Injection Locking in Low- Q LC Oscillators: Modeling and Application in a Forwarded-Clock I/O Receiver. IEEE Trans. Circuits Syst. I Regul. Pap. 56-I(8): 1818-1829 (2009) - 2008
- [j4]Ganesh Balamurugan, Joseph T. Kennedy, Gaurab Banerjee, James E. Jaussi, Mozhgan Mansuri, Frank O'Mahony, Bryan Casper, Randy Mooney:
A Scalable 5-15 Gbps, 14-75 mW Low-Power I/O Transceiver in 65 nm CMOS. IEEE J. Solid State Circuits 43(4): 1010-1019 (2008) - 2005
- [j3]James E. Jaussi, Ganesh Balamurugan, David R. Johnson, Bryan Casper, Aaron Martin, Joseph T. Kennedy, Naresh R. Shanbhag, Randy Mooney:
8-Gb/s source-synchronous I/O link with adaptive receiver equalization, offset cancellation, and clock de-skew. IEEE J. Solid State Circuits 40(1): 80-88 (2005) - 2003
- [j2]Bryan Casper, Aaron Martin, James E. Jaussi, Joe Kennedy, Randy Mooney:
An 8-Gb/s simultaneous bidirectional link with on-die waveform capture. IEEE J. Solid State Circuits 38(12): 2111-2120 (2003) - [j1]Pavan Kumar Hanumolu, Bryan Casper, Randy Mooney, Gu-Yeon Wei, Un-Ku Moon:
Analysis of PLL clock jitter in high-speed serial links. IEEE Trans. Circuits Syst. II Express Briefs 50(11): 879-886 (2003)
Conference and Workshop Papers
- 2021
- [c29]Rajesh Inti, Mozhgan Mansuri, Joe Kennedy, Junyi Qiu, Chun-Ming Hsu, Jahnavi Sharma, Hao Li, Bryan Casper, James E. Jaussi:
A Scalable 32-to-56Gb/s 0.56-to-1.28pJ/b Voltage-Mode VCSEL-Based Optical Transmitter in 28nm CMOS. CICC 2021: 1-2 - 2020
- [c28]Anandaroop Chakrabarti, Chintan Thakkar, Shuhei Yamada, Debabani Choudhury, James E. Jaussi, Bryan Casper:
4.5 A 64Gb/s 1.4pJ/b/element 60GHz 2×2-Element Phased-Array Receiver with 8b/symbol Polarization MIMO and Spatial Interference Tolerance. ISSCC 2020: 84-86 - [c27]Hao Li, Ganesh Balamurugan, Meer Sakib, Ranjeet Kumar, Hasitha Jayatilleka, Haisheng Rong, James E. Jaussi, Bryan Casper:
12.1 A 3D-Integrated Microring-Based 112Gb/s PAM-4 Silicon-Photonic Transmitter with Integrated Nonlinear Equalization and Thermal Control. ISSCC 2020: 208-210 - 2019
- [c26]Chintan Thakkar, Stefan Shopov, Anandaroop Chakrabarti, Shuhei Yamada, Debabani Choudhury, James E. Jaussi, Bryan Casper:
A 42.2Gb/s 4.3pJ/b 60GHz Digital Transmitter with 12b/Symbol Polarization MIMO. ISSCC 2019: 172-174 - [c25]Hao Li, Ganesh Balamurugan, Meer Sakib, Jie Sun, Jeffery Driscoll, Ranjeet Kumar, Hasitha Jayatilleka, Haisheng Rong, James E. Jaussi, Bryan Casper:
A 112 Gb/s PAM4 Transmitter with Silicon Photonics Microring Modulator and CMOS Driver. OFC 2019: 1-3 - 2018
- [c24]Chintan Thakkar, James E. Jaussi, Bryan Casper:
High-speed contactless I/O for computing devices. CICC 2018: 1-8 - [c23]Hao Li, Ganesh Balamurugan, James E. Jaussi, Bryan Casper:
A 112 Gb/s PAM4 Linear TIA with 0.96 pJ/bit Energy Efficiency in 28 nm CMOS. ESSCIRC 2018: 238-241 - [c22]Shinwon Kang, Chintan Thakkar, Nathan Narevsky, Kaushik Dasgupta, Saeid Daneshgar, James E. Jaussi, Bryan Casper:
A 40Gb/s 6pJ/b RX baseband in 28nm CMOS for 60GHz polarization MIMO. ISSCC 2018: 164-166 - [c21]Saeid Daneshgar, Kaushik Dasgupta, Chintan Thakkar, Anandaroop Chakrabarti, Shuhei Yamada, Debabani Choudhury, James E. Jaussi, Bryan Casper:
A 27.8Gb/s 11.5pJ/b 60GHz transceiver in 28nm CMOS with polarization MIMO. ISSCC 2018: 166-168 - [c20]Rajesh Inti, Mozhgan Mansuri, Joe Kennedy, Hariprasath Venkatram, Chun-Ming Hsu, Aaron Martin, James E. Jaussi, Bryan Casper:
A Digital-Intensive 2-to-9.2 GB/S/Pin Memory Controller I/O with Fast-Response LDO in 10NM CMOS. VLSI Circuits 2018: 151-152 - 2017
- [c19]Kaushik Dasgupta, Saeid Daneshgar, Chintan Thakkar, Kunal Datta, James E. Jaussi, Bryan Casper:
A 25 Gb/s 60 GHz digital power amplifier in 28nm CMOS. ESSCIRC 2017: 207-210 - 2016
- [c18]Chintan Thakkar, Shreyas Sen, James E. Jaussi, Bryan Casper:
23.2 A 32Gb/s bidirectional 4-channel 4pJ/b capacitively coupled link in 14nm CMOS for proximity communication. ISSCC 2016: 400-401 - 2015
- [c17]Rajesh Inti, Sudip Shekhar, Ganesh Balamurugan, James E. Jaussi, Clark Roberts, Tzu-Chien Hsueh, Bryan Casper:
A 0.5-to-0.75V, 3-to-8 Gbps/lane, 385-to-790 fJ/b, bi-directional, quad-lane forwarded-clock transceiver in 22nm CMOS. VLSIC 2015: 346- - [c16]Sudip Shekhar, Rajesh Inti, James E. Jaussi, Tzu-Chien Hsueh, Bryan Casper:
A 1.2-5Gb/s 1.4-2pJ/b serial link in 22nm CMOS with a direct data-sequencing blind oversampling CDR. VLSIC 2015: 350- - 2014
- [c15]Tzu-Chien Hsueh, Frank O'Mahony, Mozhgan Mansuri, Bryan Casper:
An on-die all-digital power supply noise analyzer with enhanced spectrum measurements. ESSCIRC 2014: 251-254 - [c14]James E. Jaussi, Ganesh Balamurugan, Sami Hyvonen, Tzu-Chien Hsueh, Tawfiq Musah, Gökçe Keskin, Sudip Shekhar, Joseph T. Kennedy, Shreyas Sen, Rajesh Inti, Mozhgan Mansuri, Michael Leddige, Bryce Horine, Clark Roberts, Randy Mooney, Bryan Casper:
26.2 A 205mW 32Gb/s 3-Tap FFE/6-tap DFE bidirectional serial link in 22nm CMOS. ISSCC 2014: 440-441 - [c13]Tzu-Chien Hsueh, Ganesh Balamurugan, James E. Jaussi, Sami Hyvonen, Joseph T. Kennedy, Gökçe Keskin, Tawfiq Musah, Sudip Shekhar, Rajesh Inti, Shreyas Sen, Mozhgan Mansuri, Clark Roberts, Bryan Casper:
26.4 A 25.6Gb/s differential and DDR4/GDDR5 dual-mode transmitter with digital clock calibration in 22nm CMOS. ISSCC 2014: 444-445 - 2013
- [c12]Sudip Shekhar, James E. Jaussi, Frank O'Mahony, Mozhgan Mansuri, Bryan Casper:
Design considerations for low-power receiver front-end in high-speed data links. CICC 2013: 1-8 - [c11]Mozhgan Mansuri, James E. Jaussi, Joseph T. Kennedy, Tzu-Chien Hsueh, Sudip Shekhar, Ganesh Balamurugan, Frank O'Mahony, Clark Roberts, Randy Mooney, Bryan Casper:
A scalable 0.128-to-1Tb/s 0.8-to-2.6pJ/b 64-lane parallel I/O in 32nm CMOS. ISSCC 2013: 402-403 - 2012
- [c10]Mozhgan Mansuri, Bryan Casper, Frank O'Mahony:
An on-die all-digital delay measurement circuit with 250fs accuracy. VLSIC 2012: 98-99 - 2010
- [c9]Frank O'Mahony, Joseph T. Kennedy, James E. Jaussi, Ganesh Balamurugan, Mozhgan Mansuri, Clark Roberts, Sudip Shekhar, Randy Mooney, Bryan Casper:
A 47×10Gb/s 1.4mW/(Gb/s) parallel interface in 45nm CMOS. ISSCC 2010: 156-157 - [c8]Ganesh Balamurugan, Frank O'Mahony, Mozhgan Mansuri, James E. Jaussi, Joseph T. Kennedy, Bryan Casper:
A 5-to-25Gb/s 1.6-to-3.8mW/(Gb/s) reconfigurable transceiver in 45nm CMOS. ISSCC 2010: 372-373 - 2008
- [c7]Mozhgan Mansuri, Frank O'Mahony, Ganesh Balamurugan, James E. Jaussi, Joseph T. Kennedy, Sudip Shekhar, Randy Mooney, Bryan Casper:
Strong injection locking of low-Q LC oscillators. CICC 2008: 699-702 - [c6]Frank O'Mahony, Sudip Shekhar, Mozhgan Mansuri, Ganesh Balamurugan, James E. Jaussi, Joseph T. Kennedy, Bryan Casper, David J. Allstot, Randy Mooney:
A 27Gb/s Forwarded-Clock I/O Receiver Using an Injection-Locked LC-DCO in 45nm CMOS. ISSCC 2008: 452-453 - 2007
- [c5]Bryan Casper, Ganesh Balamurugan, James E. Jaussi, Joseph T. Kennedy, Mozhgan Mansuri:
Future Microprocessor Interfaces: Analysis, Design and Optimization. CICC 2007: 479-486 - 2006
- [c4]Bryan Casper, James E. Jaussi, Frank O'Mahony, Mozhgan Mansuri, K. Canagasaby, Joseph T. Kennedy, E. Yeung, Randy Mooney:
A 20Gb/s Forwarded Clock Transceiver in 90nm CMOS B. ISSCC 2006: 263-272 - [c3]Bryan Casper, James E. Jaussi, Frank O'Mahony, Mozhgan Mansuri, K. Canagasaby, Joe Kennedy, Randy Mooney:
A 20Gb/s Embedded Clock Transceiver in 90nm CMOS. ISSCC 2006: 1334-1343 - [c2]Priya Iyer, Shailendra Jain, Bryan Casper, Jason Howard:
Testing High-Speed IO Links Using On-Die Circuitry. VLSI Design 2006: 807-810 - 2004
- [c1]Pavan Kumar Hanumolu, Bryan Casper, Randy Mooney, Gu-Yeon Wei, Un-Ku Moon:
Jitter in high-speed serial and parallel links. ISCAS (4) 2004: 425-428
Coauthor Index
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