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ORCIDStephane Bronckers
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2010 – 2019
- 2011
[j6]Geert Van der Plas
, Paresh Limaye, Igor Loi, Abdelkarim Mercha, Herman Oprins, Cristina Torregiani, Steven Thijs, Dimitri Linten, Michele Stucchi, Guruprasad Katti, Dimitrios Velenis, Vladimir Cherman, Bart Vandevelde, Veerle Simons, Ingrid De Wolf, Riet Labie, Dan Perry, Stephane Bronckers, Nikolaos Minas, Miro Cupac, Wouter Ruythooren, Jan Van Olmen, Alain Phommahaxay, Muriel de Potter de ten Broeck, Ann Opdebeeck, Michal Rakowski, Bart De Wachter, Morin Dehan, Marc Nelis, Rahul Agarwal, Antonio Pullini, Federico Angiolini, Luca Benini, Wim Dehaene, Youssef Travaly, Eric Beyne, Paul Marchal:
Design Issues and Considerations for Low-Cost 3-D TSV IC Technology. IEEE J. Solid State Circuits 46(1): 293-307 (2011)- 2010
- [j5]Stephane Bronckers, Geert Van der Plas, Gerd Vandersteen, Yves Rolain:
Substrate Noise Coupling Mechanisms in Lightly Doped CMOS Transistors. IEEE Trans. Instrum. Meas. 59(6): 1727-1733 (2010) - [c5]Geert Van der Plas, Paresh Limaye, Abdelkarim Mercha, Herman Oprins, Cristina Torregiani, Steven Thijs, Dimitri Linten, Michele Stucchi, Guruprasad Katti, Dimitrios Velenis, Domae Shinichi, Vladimir Cherman, Bart Vandevelde, Veerle Simons, Ingrid De Wolf, Riet Labie, Dan Perry, Stephane Bronckers, Nikolaos Minas, Miro Cupac, Wouter Ruythooren, Jan Van Olmen, Alain Phommahaxay, Muriel de Potter de ten Broeck, Ann Opdebeeck, Michal Rakowski, Bart De Wachter, Morin Dehan, Marc Nelis, Rahul Agarwal, Wim Dehaene, Youssef Travaly, Pol Marchal, Eric Beyne:
Design issues and considerations for low-cost 3D TSV IC technology. ISSCC 2010: 148-149
2000 – 2009
- 2009
- [j4]Stephane Bronckers, Karen Scheir, Geert Van der Plas, Gerd Vandersteen, Yves Rolain:
A Methodology to Predict the Impact of Substrate Noise in Analog/RF Systems. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 28(11): 1613-1626 (2009) - [j3]Stephane Bronckers, Gerd Vandersteen, Ludwig De Locht, Michael Libois, Geert Van der Plas, Yves Rolain:
Experimental Analysis of the Coupling Mechanisms Between a 4 GHz PPA and a 5-7 GHz LC -VCO. IEEE Trans. Instrum. Meas. 58(8): 2706-2713 (2009) - 2008
- [j2]Karen Scheir, Stephane Bronckers, Jonathan Borremans, Piet Wambacq, Yves Rolain:
A 52 GHz Phased-Array Receiver Front-End in 90 nm Digital CMOS. IEEE J. Solid State Circuits 43(12): 2651-2659 (2008) - [j1]Jonathan Borremans, Andrea Bevilacqua, Stephane Bronckers, Morin Dehan, Maarten Kuijk, Piet Wambacq, Jan Craninckx:
A Compact Wideband Front-End Using a Single-Inductor Dual-Band VCO in 90 nm Digital CMOS. IEEE J. Solid State Circuits 43(12): 2693-2705 (2008) - [c4]Karen Scheir, Stephane Bronckers, Jonathan Borremans, Piet Wambacq, Yves Rolain:
A 52GHz Phased-Array Receiver Front-End in 90nm Digital CMOS. ISSCC 2008: 184-185 - [c3]Jonathan Borremans, Stephane Bronckers, Piet Wambacq, Maarten Kuijk, Jan Craninckx:
A Single-Inductor Dual-Band VCO in a 0.06mm2 5.6GHz Multi-Band Front-End in 90nm Digital CMOS. ISSCC 2008: 324-325 - 2007
- [c2]Stephane Bronckers, Charlotte Soens, Geert Van der Plas, Gerd Vandersteen, Yves Rolain:
Interactive presentation: Simulation methodology and experimental verification for the analysis of substrate noise on LC-VCO's. DATE 2007: 1520-1525 - 2006
- [c1]Gerd Vandersteen, Stephane Bronckers, Petr Dobrovolný, Yves Rolain:
Systematic stability-analysis method for analog circuits. DATE 2006: 150-155
Coauthor Index
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