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Karen Scheir
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2010 – 2019
- 2010
- [c5]Bertrand Parvais, Karen Scheir, Vojkan Vidojkovic, R. Vandebriel, Gerd Vandersteen, Charlotte Soens, Piet Wambacq:
A 40 nm LP CMOS PLL for high-speed mm-wave communication. ESSCIRC 2010: 254-257 - [c4]Piet Wambacq, Vito Giannini, Karen Scheir, Wim Van Thillo, Yves Rolain:
A fifth-order 880MHz/1.76GHz active lowpass filter for 60GHz communications in 40nm digital CMOS. ESSCIRC 2010: 350-353
2000 – 2009
- 2009
- [j3]Stephane Bronckers, Karen Scheir, Geert Van der Plas, Gerd Vandersteen, Yves Rolain:
A Methodology to Predict the Impact of Substrate Noise in Analog/RF Systems. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 28(11): 1613-1626 (2009) - [c3]Karen Scheir, Gerd Vandersteen, Yves Rolain, Piet Wambacq:
A 57-to-66GHz quadrature PLL in 45nm digital CMOS. ISSCC 2009: 494-495 - 2008
- [j2]Karen Scheir, Stephane Bronckers, Jonathan Borremans, Piet Wambacq, Yves Rolain:
A 52 GHz Phased-Array Receiver Front-End in 90 nm Digital CMOS. IEEE J. Solid State Circuits 43(12): 2651-2659 (2008) - [c2]Karen Scheir, Stephane Bronckers, Jonathan Borremans, Piet Wambacq, Yves Rolain:
A 52GHz Phased-Array Receiver Front-End in 90nm Digital CMOS. ISSCC 2008: 184-185 - [c1]Piet Wambacq, Abdelkarim Mercha, Karen Scheir, Bob Verbruggen, Jonathan Borremans, Vincent De Heyn, Steven Thijs, Dimitri Linten, Geert Van der Plas, Bertrand Parvais, Morin Dehan, Stefaan Decoutere, Charlotte Soens, Nadine Collaert, Malgorzata Jurczak:
Advanced Planar Bulk and Multigate CMOS Technology: Analog-Circuit Benchmarking up to mm-Wave Frequencies. ISSCC 2008: 528-529 - 2007
- [j1]Piet Wambacq, Bob Verbruggen, Karen Scheir, Jonathan Borremans, Morin Dehan, Dimitri Linten, Vincent De Heyn, Geert Van der Plas, Abdelkarim Mercha, Bertrand Parvais, Cedric Gustin, Vaidyanathan Subramanian, Nadine Collaert, Malgorzata Jurczak, Stefaan Decoutere:
The Potential of FinFETs for Analog and RF Circuit Applications. IEEE Trans. Circuits Syst. I Regul. Pap. 54-I(11): 2541-2551 (2007)
Coauthor Index
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