"A 57-to-66GHz quadrature PLL in 45nm digital CMOS."

Karen Scheir et al. (2009)

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DOI: 10.1109/ISSCC.2009.4977524

access: closed

type: Conference or Workshop Paper

metadata version: 2017-05-17

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Karen Scheir, Gerd Vandersteen, Yves Rolain, Piet Wambacq:
A 57-to-66GHz quadrature PLL in 45nm digital CMOS. ISSCC 2009: 494-495

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