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ORCIDFederico Angiolini
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Journal Articles
- 2018
[j16]Stefanos Skalistis
, Federico Angiolini, Giovanni De Micheli, Alena Simalatsar:
Safe and Efficient Deployment of Data-Parallelizable Applications on Many-Core Platforms: Theory and Practice. IEEE Des. Test 35(4): 7-15 (2018)- [j15]Aya Ibrahim, Shuping Zhang, Federico Angiolini, Marcel Arditi, Shinji Kimura, Satoshi Goto, Jean-Philippe Thiran, Giovanni De Micheli:
Towards Ultrasound Everywhere: A Portable 3D Digital Back-End Capable of Zone and Compound Imaging. IEEE Trans. Biomed. Circuits Syst. 12(5): 968-981 (2018) - 2017
- [j14]Aya Ibrahim, Pascal A. Hager, Andrea Bartolini, Federico Angiolini, Marcel Arditi, Jean-Philippe Thiran, Luca Benini, Giovanni De Micheli:
Efficient Sample Delay Calculation for 2-D and 3-D Ultrasound Imaging. IEEE Trans. Biomed. Circuits Syst. 11(4): 815-831 (2017) - 2013
- [j13]Jaume Joven, Andrea Marongiu, Federico Angiolini, Luca Benini, Giovanni De Micheli:
An integrated, programming model-driven framework for NoC-QoS support in cluster-based embedded many-cores. Parallel Comput. 39(10): 549-566 (2013) - [j12]Dara Rahmati, Srinivasan Murali, Luca Benini, Federico Angiolini, Giovanni De Micheli, Hamid Sarbazi-Azad:
Computing Accurate Performance Bounds for Best Effort Networks-on-Chip. IEEE Trans. Computers 62(3): 452-467 (2013) - [j11]Jaume Joven, Akash Bagdia, Federico Angiolini, P. Strid, David Castells-Rufas, Eduard Fernandez-Alonso, Jordi Carrabina, Giovanni De Micheli:
QoS-Driven Reconfigurable Parallel Computing for NoC-Based Clustered MPSoCs. IEEE Trans. Ind. Informatics 9(3): 1613-1624 (2013) - 2011
- [j10]Geert Van der Plas, Paresh Limaye, Igor Loi, Abdelkarim Mercha, Herman Oprins, Cristina Torregiani, Steven Thijs, Dimitri Linten, Michele Stucchi, Guruprasad Katti, Dimitrios Velenis, Vladimir Cherman, Bart Vandevelde, Veerle Simons, Ingrid De Wolf, Riet Labie, Dan Perry, Stephane Bronckers, Nikolaos Minas, Miro Cupac, Wouter Ruythooren, Jan Van Olmen, Alain Phommahaxay, Muriel de Potter de ten Broeck, Ann Opdebeeck, Michal Rakowski, Bart De Wachter, Morin Dehan, Marc Nelis, Rahul Agarwal, Antonio Pullini, Federico Angiolini, Luca Benini, Wim Dehaene, Youssef Travaly, Eric Beyne, Paul Marchal:
Design Issues and Considerations for Low-Cost 3-D TSV IC Technology. IEEE J. Solid State Circuits 46(1): 293-307 (2011) - [j9]Igor Loi, Federico Angiolini, Shinobu Fujita, Subhasish Mitra, Luca Benini:
Characterization and Implementation of Fault-Tolerant Vertical Links for 3-D Networks-on-Chip. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 30(1): 124-134 (2011) - 2008
- [j8]Suresh Srinivasan, Lin Li, Martino Ruggiero, Federico Angiolini, Narayanan Vijaykrishnan, Luca Benini:
Exploring architectural solutions for energy optimisations in bus-based system-on-chip. IET Comput. Digit. Tech. 2(5): 347-354 (2008) - [j7]David Atienza, Federico Angiolini, Srinivasan Murali, Antonio Pullini, Luca Benini, Giovanni De Micheli:
Network-on-Chip design and synthesis outlook. Integr. 41(3): 340-359 (2008) - [j6]Shankar Mahadevan, Federico Angiolini, Jens Sparsø, Luca Benini, Jan Madsen:
A Reactive and Cycle-True IP Emulator for MPSoC Exploration. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 27(1): 109-122 (2008) - 2007
- [j5]Antonio Pullini, Federico Angiolini, Srinivasan Murali, David Atienza, Giovanni De Micheli, Luca Benini:
Bringing NoCs to 65 nm. IEEE Micro 27(5): 75-85 (2007) - [j4]Federico Angiolini, Paolo Meloni, Salvatore Carta, Luigi Raffo, Luca Benini:
A Layout-Aware Analysis of Networks-on-Chip and Traditional Interconnects for MPSoCs. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 26(3): 421-434 (2007) - [j3]Rutuparna Tamhankar, Srinivasan Murali, Stergios Stergiou, Antonio Pullini, Federico Angiolini, Luca Benini, Giovanni De Micheli:
Timing-Error-Tolerant Network-on-Chip Design Methodology. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 26(7): 1297-1310 (2007) - [j2]Paolo Meloni, Igor Loi, Federico Angiolini, Salvatore Carta, Massimo Barbaro, Luigi Raffo, Luca Benini:
Area and Power Modeling for Networks-on-Chip with Layout Awareness. VLSI Design 2007: 50285:1-50285:12 (2007) - 2005
- [j1]Federico Angiolini, Luca Benini, Alberto Caprara:
An efficient profile-based algorithm for scratchpad memory partitioning. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 24(11): 1660-1676 (2005)
Conference and Workshop Papers
- 2017
- [c38]Bruno Donato, Francesca Stradolini, Abuduwaili Tuoheti, Federico Angiolini, Danilo Demarchi, Giovanni De Micheli, Sandro Carrara:
Raspberry Pi driven flow-injection system for electrochemical continuous monitoring platforms. BioCAS 2017: 1-4 - [c37]Aya Ibrahim, Damien Doy, Claudio Loureiro, Eliéva Pignat, Federico Angiolini, Marcel Arditi, Jean-Philippe Thiran, Giovanni De Micheli:
Inexpensive 1024-channel 3D telesonography system on FPGA. BioCAS 2017: 1-4 - [c36]Aya Ibrahim, Damien Doy, Claudio Loureiro, Eliéva Pignat, Federico Angiolini, Marcel Arditi, Jean-Philippe Thiran, Giovanni De Micheli:
Live demonstration: Inexpensive 1024-channel 3D telesonography system on FPGA. BioCAS 2017: 1 - [c35]Aya Ibrahim, William Andrew Simon, Damien Doy, Eliéva Pignat, Federico Angiolini, Marcel Arditi, Jean-Philippe Thiran, Giovanni De Micheli:
Single-FPGA complete 3D and 2D medical ultrasound imager. DASIP 2017: 1-6 - [c34]Federico Angiolini, Aya Ibrahim, William Andrew Simon, Ahmet Caner Yuzuguler, Marcel Arditi, Jean-Philippe Thiran, Giovanni De Micheli:
1024-Channel 3D ultrasound digital beamformer in a single 5W FPGA. DATE 2017: 1225-1228 - 2016
- [c33]Ahmet Caner Yuzuguler, William Andrew Simon, Aya Ibrahim, Federico Angiolini, Marcel Arditi, Jean-Philippe Thiran, Giovanni De Micheli:
Demo: Efficient delay and apodization for on-FPGA 3D ultrasound. DASIP 2016: 227-228 - [c32]William Andrew Simon, Ahmet Caner Yuzuguler, Aya Ibrahim, Federico Angiolini, Marcel Arditi, Jean-Philippe Thiran, Giovanni De Micheli:
Single-FPGA, scalable, low-power, and high-quality 3D ultrasound beamformer. FPL 2016: 1-2 - [c31]Ahmet Caner Yuzuguler, William Andrew Simon, Aya Ibrahim, Federico Angiolini, Marcel Arditi, Jean-Philippe Thiran, Giovanni De Micheli:
Single-FPGA 3D ultrasound beamformer. FPL 2016: 1 - 2015
- [c30]Aya Ibrahim, Pascal Hager, Andrea Bartolini, Federico Angiolini, Marcel Arditi, Luca Benini, Giovanni De Micheli:
Tackling the bottleneck of delay tables in 3D ultrasound imaging. DATE 2015: 1683-1688 - 2014
- [c29]Alberto Ghiribaldi, Hervé Tatenguem Fankem, Federico Angiolini, Mikkel Bystrup Stensgaard, Tobias Bjerregaard, Davide Bertozzi:
A vertically integrated and interoperable multi-vendor synthesis flow for predictable noc design in nanoscale technologies. ASP-DAC 2014: 337-342 - 2012
- [c28]Alessandro Strano, Davide Bertozzi, Federico Angiolini, Leonardo Di G. Gregorio, Frank Olaf Sem-Jacobsen, Vladimir Todorov, José Flich, José Silla, Tobias Bjerregaard:
Quest for the ultimate network-on-chip: the NaNoC project. INA-OCMC@HiPEAC 2012: 43-46 - 2010
- [c27]Jaume Joven, Andrea Marongiu, Federico Angiolini, Luca Benini, Giovanni De Micheli:
Exploring programming model-driven QoS support for NoC-based platforms. CODES+ISSS 2010: 65-74 - [c26]Giovanni De Micheli, Ciprian Seiculescu, Srinivasan Murali, Luca Benini, Federico Angiolini, Antonio Pullini:
Networks on Chips: from research to products. DAC 2010: 300-305 - 2009
- [c25]Dragomir Milojevic, Trevor E. Carlson, Kris Croes, Riko Radojcic, Diana F. Ragett, Dirk Seynhaeve, Federico Angiolini, Geert Van der Plas, Paul Marchal:
Automated Pathfinding tool chain for 3D-stacked integrated circuits: Practical case study. 3DIC 2009: 1-6 - [c24]Igor Loi, Federico Angiolini, Luca Benini:
Synthesis of low-overhead configurable source routing tables for network interfaces. DATE 2009: 262-267 - [c23]Dara Rahmati, Srinivasan Murali, Luca Benini, Federico Angiolini, Giovanni De Micheli, Hamid Sarbazi-Azad:
A method for calculating hard QoS guarantees for Networks-on-Chip. ICCAD 2009: 579-586 - [c22]Mohammad Reza Kakoee, Federico Angiolini, Srinivasan Murali, Antonio Pullini, Ciprian Seiculescu, Luca Benini:
A floorplan-aware interactive tool flow for NoC design and synthesis. SoCC 2009: 379-382 - 2008
- [c21]Igor Loi, Federico Angiolini, Luca Benini:
Developing Mesochronous Synchronizers to Enable 3D NoCs. DATE 2008: 1414-1419 - 2007
- [c20]Federico Angiolini, M. Haykel Ben Jamaa, David Atienza, Luca Benini, Giovanni De Micheli:
Interactive presentation: Improving the fault tolerance of nanometric PLA designs. DATE 2007: 570-575 - [c19]Igor Loi, Federico Angiolini, Luca Benini:
Supporting vertical links for 3D networks-on-chip: toward an automated design and analysis flow. Nano-Net 2007: 15 - [c18]Antonio Pullini, Federico Angiolini, Paolo Meloni, David Atienza, Srinivasan Murali, Luigi Raffo, Giovanni De Micheli, Luca Benini:
NoC Design and Implementation in 65nm Technology. NOCS 2007: 273-282 - 2006
- [c17]Federico Angiolini, Paolo Meloni, Salvatore Carta, Luca Benini, Luigi Raffo:
Contrasting a NoC and a traditional interconnect fabric with layout awareness. DATE 2006: 124-129 - [c16]Federico Angiolini, Jianjiang Ceng, Rainer Leupers, Federico Ferrari, Cesare Ferri, Luca Benini:
An integrated open framework for heterogeneous MPSoC design space exploration. DATE 2006: 1145-1150 - [c15]Srinivasan Murali, Paolo Meloni, Federico Angiolini, David Atienza, Salvatore Carta, Luca Benini, Giovanni De Micheli, Luigi Raffo:
Designing application-specific networks on chips with floorplan information. ICCAD 2006: 355-362 - [c14]Federico Angiolini, David Atienza, Srinivasan Murali, Luca Benini, Giovanni De Micheli:
Reliability Support for On-Chip Memories Using Networks-on-Chip. ICCD 2006: 389-396 - [c13]Srinivasan Murali, Rutuparna Tamhankar, Federico Angiolini, Antonio Pullini, David Atienza, Luca Benini, Giovanni De Micheli:
Comparison of a Timing-Error Tolerant Scheme with a Traditional Re-transmission Mechanism for Networks on Chips. SoC 2006: 1-4 - [c12]Paolo Meloni, Salvatore Carta, Roberto Argiolas, Luigi Raffo, Federico Angiolini:
Area and Power Modeling Methodologies for Networks-on-Chip. Nano-Net 2006: 1-7 - [c11]Srinivasan Murali, Paolo Meloni, Federico Angiolini, David Atienza, Salvatore Carta, Luca Benini, Giovanni De Micheli, Luigi Raffo:
Designing Message-Dependent Deadlock Free Networks on Chips for Application-Specific Systems on Chips. VLSI-SoC 2006: 158-163 - [c10]Srinivasan Murali, Paolo Meloni, Federico Angiolini, David Atienza, Salvatore Carta, Luca Benini, Giovanni De Micheli, Luigi Raffo:
Designing Routing and Message-Dependent Deadlock Free Networks on Chips. VLSI-SoC (Selected Papers) 2006: 337-355 - 2005
- [c9]Shankar Mahadevan, Federico Angiolini, Michael Storgaard, Rasmus Grøndahl Olsen, Jens Sparsø, Jan Madsen:
A Network Traffic Generator Model for Fast Network-on-Chip Simulation. DATE 2005: 780-785 - [c8]Stergios Stergiou, Federico Angiolini, Salvatore Carta, Luigi Raffo, Davide Bertozzi, Giovanni De Micheli:
xpipes Lite: A Synthesis Oriented Design Library For Networks on Chips. DATE 2005: 1188-1193 - [c7]Federico Angiolini, Paolo Meloni, Luca Benini, Salvatore Carta, Luigi Raffo:
Networks on Chips: A Synthesis Perspective. PARCO 2005: 745-752 - [c6]Antonio Pullini, Federico Angiolini, Davide Bertozzi, Luca Benini:
Fault tolerance overhead in network-on-chip flow control schemes. SBCCI 2005: 224-229 - [c5]Suresh Srinivasan, Federico Angiolini, Martino Ruggiero, Luca Benini, Narayanan Vijaykrishnan:
Simultaneous memory and bus partitioning for SoC architectures. SoCC 2005: 125-128 - [c4]Shankar Mahadevan, Federico Angiolini, Jens Sparsø, Luca Benini, Jan Madsen:
A Traffic Injection Methodology with Support for System-Level Synchronization. VLSI-SoC 2005: 145-161 - 2004
- [c3]Federico Angiolini, Francesco Menichelli, Alberto Ferrero, Luca Benini, Mauro Olivieri:
A post-compiler approach to scratchpad mapping of code. CASES 2004: 259-267 - [c2]Mirko Loghi, Federico Angiolini, Davide Bertozzi, Luca Benini, Roberto Zafalon:
Analyzing On-Chip Communication in a MPSoC Environment. DATE 2004: 752-757 - 2003
- [c1]Federico Angiolini, Luca Benini, Alberto Caprara:
Polynomial-time algorithm for on-chip scratchpad memory partitioning. CASES 2003: 318-326
Editorship
- 2015
- [e2]Masoumeh Ebrahimi, Diana Goehringer, Masoud Daneshtalab, Maurizio Palesi, Sören Sonntag, Federico Angiolini:
Proceedings of the 3rd International Workshop on Many-core Embedded Systems (MES'2015) held on June 13, 2015 in conjunction with the 42nd International Symposium on Computer Architecture (ISCA'2015), Portland, OR, USA. ACM 2015, ISBN 978-1-4503-3408-2 [contents] - 2014
- [e1]Masoud Daneshtalab, Masoumeh Ebrahimi, Maurizio Palesi, Federico Angiolini, Juha Plosila:
Proceedings of the 2nd International Workshop on Many-core Embedded Systems, MES'2014, in conjunction with the 41st International Symposium on Computer Architecture, ISCA'2014, Minneapolis, MN, USA, June 15, 2014. ACM 2014, ISBN 978-1-4503-2822-7 [contents]
Coauthor Index
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