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ORCID2. Nano-Net 2007: Catania, Italy
- Salvatore Coffa:
2nd Internationa ICST Conference on Nano-Networks, Nano-Net 2007, Catania, Italy, September 24-26, 2007. ICST/ACM 2007, ISBN 978-963-9799-10-3
Keynote speech
- El-Hang Lee:
Micro/nano-scale optical circuits and networks: issues, challenges and progresses. 1
Nanoscale architecture and coding
- Helia Naeimi, André DeHon:
Fault tolerant nano-memory with fault secure encoder and decoder. 2 - Teijo Lehtonen, Pasi Liljeberg, Juha Plosila:
Analysis of forward error correction methods for nanoscale networks-on-chip. 3 - Milos Stanisavljevic, Frank Kagan Gürkaynak, Alexandre Schmid, Yusuf Leblebici, Maria Gabrani:
A 90nm CMOS cryptographic core with improved fault-tolerance in presence of massive defect density. 4 - Davide Urbano, Emilio Arnieri, Gregorio Cappuccino, Giandomenico Amendola:
Integrated waveguides for ultra-high speed interconnects. 5
Optical networks and NEMS
- Mohammad Azim Karami, Mehdi Ahmadi-Boroujeni, Ali Afzali-Kusha, Reza Faraji-Dana:
Semi-analytic model for dispersion relation of nanowire lasers. 6 - Nikolai Nefedov:
Spectral sensing with coupled nanoscale oscillators. 7 - Dimitrios Tsamados, Yogesh Singh Chauhan, Christoph Eggimann, Adrian Mihai Ionescu:
Suspended-gate FET as a sleep transistor for ultra-low stand-by power applications. 8
Networks-on-chip: implementation issues
- Sergio Tota, Mario R. Casu, Paolo Motto Ros, Massimo Ruo Roch, Maurizio Zamboni:
A methodology and a case-study for network-on-chip based MP-SoC architectures. 9 - Daniele Mangano, Alberto Scandurra, Carlo Pistritto:
Relieving physical issues in new NoC-based SoCs. 10 - Dan Zhao, Yi Wang, Hongyi Wu:
Dual-channel binary-countdown medium access control in wireless network-on-chip. 11
Networks-on-chip: topology issues
- Christof Teuscher:
Topology-unaware routing in irregular self-assembled networks-on-chip: an explorative case study. 12 - Kristina Kunert, P. Mattias Weckstén, Magnus Jonsson:
Algorithm for the choice of topology in reconfigurable on-chip networks with real-time support. 13 - Gianluca Palermo, Giovanni Mariani, Cristina Silvano, Riccardo Locatelli, Marcello Coppola
:
A topology design customization approach for STNoC. 14 - Igor Loi, Federico Angiolini, Luca Benini:
Supporting vertical links for 3D networks-on-chip: toward an automated design and analysis flow. 15
Optoelectronic nanodevices
- Maurizio Casalino, Luigi Sirleto, Luigi Moretti, Francesco Giuseppe Della Corte, Ivo Rendina:
Au, Ag and Cu-silicon RCE photodetectors based on the internal photoemission effect at 1.55 micron. 16 - Luigi Sirleto, Maria Antonietta Ferrara, Bahram Jalali, Ivo Rendina:
Raman approach in silicon nanostructure at 1.5 micron. 17 - Sandro Rao, Maria Arcangela Nigro, Francesco Suriano, Francesco Giuseppe Della Corte, Caterina Summonte, Alberto Scandurra:
Design, fabrication and characterization of an α - Si: H / α - SiCN waveguide multistack for electro-optical modulation. 18
Molecular and atomistic nanostructures
- Frank Walsh, Sasitharan Balasubramaniam, Dmitri Botvich, William Donnelly, Sergey Sergeyev:
Development of molecular based communication protocols for nanomachines. 19 - Kenichi Fujibayashi, Satoshi Murata:
Thermodynamic simulations of DNA tile self-assembly. 20 - Murat Yuksel, Tansel Karabacak, Hasan Guclu:
Networking behavior in thin film and nanostructure growth dynamics. 21
Keynote speech
- Guoqing Chen, Hui Chen, Mikhail Haurylau, Nicholas Nelson, David H. Albonesi, Philippe M. Fauchet, Eby G. Friedman:
On-chip optical interconnect for reduced delay uncertainty. 22
Nanoscale interconnect
- Alex Yakovlev:
Asynchronous links for nanonets. 23 - Fred Chen, Ajay Joshi, Vladimir Stojanovic, Anantha P. Chandrakasan:
Scaling and evaluation of carbon nanotube interconnects for VLSI applications. 24 - J. V. R. Ravindra, M. B. Srinivas:
Generating reduced order models using subspace iteration for linear RLC circuits in nanometer designs. 25
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