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ORCIDSiddharth Joshi 0001
Person information
- affiliation: University of Notre Dame, Department of Electrical Engineering, IN, USA
- affiliation: University of California, San Diego, Department of Electrical and Computer Engineering, Jacobs School of Engineering, Institute of Neural Computation, USA
- affiliation (PhD 2017): University of California, San Diego, USA
Other persons with the same name
- Siddharth Joshi — disambiguation page
- Siddharth Joshi 0002 — Almae Technologies, Marcoussis, France (and 3 more)
- Siddharth Joshi 0003 — University of Stanford, Department of Electrical Engineering, CA, USA
- Siddharth Joshi 0004 — University of California, Los Angeles, UCLA, Department of Computer Science, CA, USA
- Siddharth Joshi 0005 — Indian Institute of Technology, Department of Electrical Engineering, Bombay, Mumbai, India
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2020 – today
- 2024
[c30]Thomas M. Summe, Clemens JS Schaefer, Siddharth Joshi:
Estimating Post-Synaptic Effects for Online Training of Feed-Forward SNNs. ICONS 2024: 264-271- [c29]Clemens J. S. Schaefer, Siddharth Joshi, Shan Li, Raúl Blázquez:
Edge Inference with Fully Differentiable Quantized Mixed Precision Neural Networks. WACV 2024: 8445-8454 - [i17]Thomas Summe, Siddharth Joshi:
Slax: A Composable JAX Library for Rapid and Flexible Prototyping of Spiking Neural Networks. CoRR abs/2404.05807 (2024) - [i16]Xunzhao Yin, Hamza Errahmouni Barkam, Franz Müller, Yu Jiang, Mohsen Imani, Sukhrob Abdulazhanov, Alptekin Vardar, Nellie Laleni, Zijian Zhao, Jiahui Duan, Zhiguo Shi, Siddharth Joshi, Michael T. Niemier, Xiaobo Sharon Hu, Cheng Zhuo, Thomas Kämpfe, Kai Ni:
A Remedy to Compute-in-Memory with Dynamic Random Access Memory: 1FeFET-1C Technology for Neuro-Symbolic AI. CoRR abs/2410.15296 (2024) - 2023
- [j10]Gert Cauwenberghs
, Jason Cong, X. Sharon Hu, Siddharth Joshi, Subhasish Mitra, Wolfgang Porod, H.-S. Philip Wong:
Micro/Nano Circuits and Systems Design and Design Automation: Challenges and Opportunities. Proc. IEEE 111(6): 561-574 (2023) - [j9]Clemens JS Schaefer, Pooria Taheri, Mark Horeni, Siddharth Joshi:
The Hardware Impact of Quantization and Pruning for Weights in Spiking Neural Networks. IEEE Trans. Circuits Syst. II Express Briefs 70(5): 1789-1793 (2023) - [i15]Clemens JS Schaefer, Elfie Guo, Caitlin Stanton, Xiaofan Zhang, Tom Jablin, Navid Lambert-Shirzad, Jian Li, Chiachen Chou, Siddharth Joshi, Yu Emma Wang:
Mixed Precision Post Training Quantization of Neural Networks with Sensitivity Guided Search. CoRR abs/2302.01382 (2023) - [i14]Clemens JS Schaefer, Pooria Taheri, Mark Horeni, Siddharth Joshi:
The Hardware Impact of Quantization and Pruning for Weights in Spiking Neural Networks. CoRR abs/2302.04174 (2023) - [i13]Jason Yik, Soikat Hasan Ahmed, Zergham Ahmed, Brian Anderson, Andreas G. Andreou, Chiara Bartolozzi, Arindam Basu, Douwe den Blanken, Petrut Bogdan, Sander M. Bohté, Younes Bouhadjar, Sonia M. Buckley, Gert Cauwenberghs, Federico Corradi, Guido de Croon, Andreea Danielescu, Anurag Reddy Daram, Mike Davies, Yigit Demirag, Jason Eshraghian, Jeremy Forest, Steve B. Furber, Michael Furlong, Aditya Gilra, Giacomo Indiveri, Siddharth Joshi, Vedant Karia, Lyes Khacef, James C. Knight, Laura Kriener, Rajkumar Kubendran, Dhireesha Kudithipudi, Gregor Lenz, Rajit Manohar, Christian Mayr, Konstantinos P. Michmizos, Dylan R. Muir, Emre Neftci, Thomas Nowotny, Fabrizio Ottati, Ayça Özcelikkale, Noah Pacik-Nelson, Priyadarshini Panda, Pao-Sheng Sun, Melika Payvand, Christian Pehle, Mihai A. Petrovici, Christoph Posch, Alpha Renner, Yulia Sandamirskaya, Clemens JS Schaefer, André van Schaik, Johannes Schemmel, Catherine D. Schuman, Jae-sun Seo, Sumit Bam Shrestha, Manolis Sifalakis, Amos Sironi, Kenneth Michael Stewart, Terrence C. Stewart, Philipp Stratmann, Guangzhi Tang, Jonathan Timcheck, Marian Verhelst, Craig M. Vineyard, Bernhard Vogginger, Amirreza Yousefzadeh, Biyan Zhou, Fatima Tuz Zohora, Charlotte Frenkel, Vijay Janapa Reddi:
NeuroBench: Advancing Neuromorphic Computing through Collaborative, Fair and Representative Benchmarking. CoRR abs/2304.04640 (2023) - [i12]Clemens JS Schaefer, Navid Lambert-Shirzad, Xiaofan Zhang, Chiachen Chou, Tom Jablin, Jian Li, Elfie Guo, Caitlin Stanton, Siddharth Joshi, Yu Emma Wang:
Augmenting Hessians with Inter-Layer Dependencies for Mixed-Precision Post-Training Quantization. CoRR abs/2306.04879 (2023) - [i11]Martin Schiemer, Clemens JS Schaefer, Jayden Parker Vap, Mark James Horeni, Yu Emma Wang, Juan Ye, Siddharth Joshi:
Hadamard Domain Training with Integers for Class Incremental Quantized Learning. CoRR abs/2310.03675 (2023) - [i10]Mark Horeni, Siddharth Joshi:
Improvements in Interlayer Pipelining of CNN Accelerators Using Genetic Algorithms. CoRR abs/2311.12235 (2023) - [i9]Thomas Summe, Clemens JS Schaefer, Siddharth Joshi:
Estimating Post-Synaptic Effects for Online Training of Feed-Forward SNNs. CoRR abs/2311.16151 (2023) - 2022
- [j8]Weier Wan, Rajkumar Kubendran, Clemens J. S. Schaefer, Sukru Burc Eryilmaz, Wenqiang Zhang, Dabin Wu, Stephen R. Deiss, Priyanka Raina, He Qian, Bin Gao, Siddharth Joshi, Huaqiang Wu, H.-S. Philip Wong, Gert Cauwenberghs:
A compute-in-memory chip based on resistive random-access memory. Nat. 608(7923): 504-512 (2022) - [c28]Mark Horeni, Pooria Taheri, Po-An Tsai, Angshuman Parashar, Joel S. Emer, Siddharth Joshi:
Ruby: Improving Hardware Efficiency for Tensor Algebra Accelerators Through Imperfect Factorization. ISPASS 2022: 254-266 - [i8]Clemens J. S. Schaefer, Siddharth Joshi, Shan Li, Raúl Blázquez:
Edge Inference with Fully Differentiable Quantized Mixed Precision Neural Networks. CoRR abs/2206.07741 (2022) - 2021
- [c27]Clemens J. S. Schaefer, Mark Horeni, Pooria Taheri, Siddharth Joshi:
LSTMs for Keyword Spotting with ReRAM-Based Compute-In-Memory Architectures. ISCAS 2021: 1-5 - [i7]Weier Wan, Rajkumar Kubendran, Clemens J. S. Schaefer, Sukru Burc Eryilmaz, Wenqiang Zhang, Dabin Wu, Stephen R. Deiss, Priyanka Raina, He Qian, Bin Gao, Siddharth Joshi, Huaqiang Wu, H.-S. Philip Wong, Gert Cauwenberghs:
Edge AI without Compromise: Efficient, Versatile and Accurate Neurocomputing in Resistive Random-Access Memory. CoRR abs/2108.07879 (2021) - 2020
- [c26]Arman Kazemi, Cristobal Alessandri, Alan C. Seabaugh, Xiaobo Sharon Hu, Michael T. Niemier, Siddharth Joshi:
A Device Non-Ideality Resilient Approach for Mapping Neural Networks to Crossbar Arrays. DAC 2020: 1-6 - [c25]Clemens J. S. Schaefer, Siddharth Joshi:
Quantizing Spiking Neural Networks with Integers. ICONS 2020: 11:1-11:8 - [c24]Rajkumar Kubendran, Weier Wan, Siddharth Joshi, H.-S. Philip Wong, Gert Cauwenberghs:
A 1.52 pJ/Spike Reconfigurable Multimodal Integrate-and-Fire Neuron Array Transceiver. ICONS 2020: 18:1-18:4 - [c23]Rajkumar Kubendran, Jongkil Park, Ritvik Sharma, Chul Kim, Siddharth Joshi, Gert Cauwenberghs, Sohmyung Ha:
A 4.2-pJ/Conv 10-b Asynchronous ADC with Hybrid Two-Tier Level-Crossing Event Coding. ISCAS 2020: 1-5 - [c22]Clemens J. S. Schaefer, Patrick Faley, Emre O. Neftci, Siddharth Joshi:
Memory Organization for Energy-Efficient Learning and Inference in Digital Neuromorphic Accelerators. ISCAS 2020: 1-5 - [c21]Qiuwen Lou, Tianqi Gao, Patrick Faley, Michael T. Niemier, Xiaobo Sharon Hu, Siddharth Joshi:
Embedding error correction into crossbars for reliable matrix vector multiplication using emerging devices. ISLPED 2020: 139-144 - [c20]Weier Wan, Rajkumar Kubendran, Sukru Burc Eryilmaz, Wenqiang Zhang, Yan Liao, Dabin Wu, Stephen R. Deiss, Bin Gao, Priyanka Raina, Siddharth Joshi, Huaqiang Wu, Gert Cauwenberghs, H.-S. Philip Wong:
33.1 A 74 TMACS/W CMOS-RRAM Neurosynaptic Core with Dynamically Reconfigurable Dataflow and In-situ Transposable Weights for Probabilistic Graphical Models. ISSCC 2020: 498-500 - [c19]Zephan M. Enciso, Seyed Hadi Mirfarshbafan, Oscar Castañeda, Clemens J. S. Schaefer, Christoph Studer, Siddharth Joshi:
Analog vs. Digital Spatial Transforms: A Throughput, Power, and Area Comparison. MWSCAS 2020: 125-128 - [c18]Clemens J. S. Schaefer, Siddharth Joshi:
Memory Organization and Structures for On-Chip Learning in Spiking Neural Networks. MWSCAS 2020: 599-602 - [i6]Clemens J. S. Schaefer, Patrick Faley, Emre O. Neftci, Siddharth Joshi:
Memory Organization for Energy-Efficient Learning and Inference in Digital Neuromorphic Accelerators. CoRR abs/2003.11639 (2020) - [i5]Arman Kazemi, Cristobal Alessandri, Alan C. Seabaugh, Xiaobo Sharon Hu, Michael T. Niemier, Siddharth Joshi:
A Device Non-Ideality Resilient Approach for Mapping Neural Networks to Crossbar Arrays. CoRR abs/2004.06094 (2020) - [i4]Zephan M. Enciso, Seyed Hadi Mirfarshbafan, Oscar Castañeda, Clemens J. S. Schaefer, Christoph Studer, Siddharth Joshi:
Analog vs. Digital Spatial Transforms: A Throughput, Power, and Area Comparison. CoRR abs/2009.07332 (2020)
2010 – 2019
- 2019
- [j7]Yasufumi Sakai, Bruno U. Pedroni, Siddharth Joshi, Satoshi Tanabe, Abraham Akinin, Gert Cauwenberghs:
Dropout and DropConnect for Reliable Neuromorphic Inference Under Communication Constraints in Network Connectivity. IEEE J. Emerg. Sel. Topics Circuits Syst. 9(4): 658-667 (2019) - [j6]Siddharth Joshi, Chul Kim, Chris M. Thomas, Gert Cauwenberghs:
Digitally Adaptive High-Fidelity Analog Array Signal Processing Resilient to Capacitive Multiplying DAC Inter-Stage Gain Error. IEEE Trans. Circuits Syst. I Regul. Pap. 66-I(11): 4095-4107 (2019) - [c17]Yasufumi Sakai, Bruno U. Pedroni, Siddharth Joshi, Abraham Akinin, Gert Cauwenberghs:
DropOut and DropConnect for Reliable Neuromorphic Inference under Energy and Bandwidth Constraints in Network Connectivity. AICAS 2019: 76-80 - 2018
- [j5]Chul Kim, Siddharth Joshi, Hristos Courellis, Jun Wang, Cory T. Miller, Gert Cauwenberghs:
Sub-µVrms-Noise Sub-µW/Channel ADC-Direct Neural Recording With 200-mV/ms Transient Recovery Through Predictive Digital Autoranging. IEEE J. Solid State Circuits 53(11): 3101-3110 (2018) - [c16]Surabhi Kalyan, Siddharth Joshi, Sadique Sheik, Bruno U. Pedroni, Gert Cauwcnbcrghs:
Unsupervised Synaptic Pruning Strategies for Restricted Boltzmann Machines. BioCAS 2018: 1-4 - [c15]Chul Kim, Siddharth Joshi, Hristos Courellis, Jun Wang, Cory T. Miller, Gert Cauwenberghs:
A 92dB dynamic range sub-μVrms-noise 0.8μW/ch neural-recording ADC array with predictive digital autoranging. ISSCC 2018: 470-472 - 2017
- [b1]Siddharth Joshi:
High-Fidelity Spatial Signal Processing in Low-Power Mixed-Signal VLSI Arrays. University of California, San Diego, USA, 2017 - [j4]Jongkil Park, Theodore Yu, Siddharth Joshi, Christoph Maier, Gert Cauwenberghs:
Hierarchical Address Event Routing for Reconfigurable Large-Scale Neuromorphic Systems. IEEE Trans. Neural Networks Learn. Syst. 28(10): 2408-2422 (2017) - [c14]Siddharth Joshi, Bruno U. Pedroni, Gert Cauwenberghs:
Neuromorphic event-driven multi-scale synaptic connectivity and plasticity. ACSSC 2017: 2059-2063 - [c13]Siddharth Joshi, Chul Kim, Sohmyung Ha, Gert Cauwenberghs:
From algorithms to devices: Enabling machine learning through ultra-low-power VLSI mixed-signal array processing. CICC 2017: 1-9 - [c12]Said Hamdioui, Shahar Kvatinsky, Gert Cauwenberghs, Lei Xie, Nimrod Wald, Siddharth Joshi, Hesham Mostafa Elsayed, Henk Corporaal, Koen Bertels:
Memristor for computing: Myth or reality? DATE 2017: 722-731 - [c11]Siddharth Joshi, Chul Kim, Sohmyung Ha, Yu Mike Chi, Gert Cauwenberghs:
21.7 2pJ/MAC 14b 8×8 linear transform mixed-signal spatial filter in 65nm CMOS with 84dB interference suppression. ISSCC 2017: 364-365 - 2016
- [j3]Chul Kim, Siddharth Joshi, Chris M. Thomas, Sohmyung Ha, Lawrence E. Larson, Gert Cauwenberghs:
A 1.3 mW 48 MHz 4 Channel MIMO Baseband Receiver With 65 dB Harmonic Rejection and 48.5 dB Spatial Signal Separation. IEEE J. Solid State Circuits 51(4): 832-844 (2016) - [j2]Sohmyung Ha, Chul Kim, Jongkil Park, Siddharth Joshi, Gert Cauwenberghs:
Energy Recycling Telemetry IC With Simultaneous 11.5 mW Power and 6.78 Mb/s Backward Data Delivery Over a Single 13.56 MHz Inductive Link. IEEE J. Solid State Circuits 51(11): 2664-2678 (2016) - [j1]Siddharth Joshi, Chul Kim, Gert Cauwenberghs:
A 6.5-µW/MHz Charge Buffer With 7-fF Input Capacitance in 65-nm CMOS for Noncontact Electropotential Sensing. IEEE Trans. Circuits Syst. II Express Briefs 63-II(12): 1161-1165 (2016) - [c10]Bruno U. Pedroni, Sadique Sheik, Siddharth Joshi, Georgios Detorakis, Somnath Paul, Charles Augustine, Emre Neftci, Gert Cauwenberghs:
Forward table-based presynaptic event-triggered spike-timing-dependent plasticity. BioCAS 2016: 580-583 - [c9]Siddharth Joshi, Chul Kim, Gert Cauwenberghs:
A 6μW/MHz charge buffer with 7fF input capacitance in 65nm CMOS for non-contact electropotential sensing. ISCAS 2016: 2907 - [c8]Sukru Burc Eryilmaz, Siddharth Joshi, Emre Neftci, Weier Wan, Gert Cauwenberghs, H.-S. Philip Wong:
Neuromorphic architectures with electronic synapses. ISQED 2016: 118-123 - [i3]Bruno U. Pedroni, Sadique Sheik, Siddharth Joshi, Georgios Detorakis, Somnath Paul, Charles Augustine, Emre Neftci, Gert Cauwenberghs:
Forward Table-Based Presynaptic Event-Triggered Spike-Timing-Dependent Plasticity. CoRR abs/1607.03070 (2016) - [i2]Sukru Burc Eryilmaz, Emre Neftci, Siddharth Joshi, SangBum Kim, Matthew BrightSky, Hsiang-Lan Lung, Chung Lam, Gert Cauwenberghs, H.-S. Philip Wong:
Training a Probabilistic Graphical Model with Resistive Switching Electronic Synapses. CoRR abs/1609.08686 (2016) - 2015
- [c7]Chul Kim, Siddharth Joshi, Chris M. Thomas, Sohmyung Ha, Abraham Akinin, Lawrence E. Larson, Gert Cauwenberghs:
A CMOS 4-channel MIMO baseband receiver with 65dB harmonic rejection over 48MHz and 50dB spatial signal separation over 3MHz at 1.3mW. VLSIC 2015: 304- - [i1]Emre Neftci, Bruno U. Pedroni, Siddharth Joshi, Maruan Al-Shedivat, Gert Cauwenberghs:
Unsupervised Learning in Synaptic Sampling Machines. CoRR abs/1511.04484 (2015) - 2014
- [c6]Jongkil Park, Sohmyung Ha, Chul Kim, Siddharth Joshi, Theodore Yu, Wei Ma, Gert Cauwenberghs:
A 12.6 mW 8.3 Mevents/s contrast detection 128×128 imager with 75 dB intra-scene DR asynchronous random-access digital readout. BioCAS 2014: 564-567 - [c5]Chul Kim, Sohmyung Ha, Chris M. Thomas, Siddharth Joshi, Jongkil Park, Lawrence E. Larson, Gert Cauwenberghs:
A 7.86 mW +12.5 dBm in-band IIP3 8-to-320 MHz capacitive harmonic rejection mixer in 65nm CMOS. ESSCIRC 2014: 227-230 - [c4]Sohmyung Ha, Chul Kim, Jongkil Park, Siddharth Joshi, Gert Cauwenberghs:
Energy-recycling integrated 6.78-Mbps data 6.3-mW power telemetry over a single 13.56-MHz inductive link. VLSIC 2014: 1-2 - 2012
- [c3]Theodore Yu, Jongkil Park, Siddharth Joshi, Christoph Maier, Gert Cauwenberghs:
65k-neuron integrate-and-fire array transceiver with address-event reconfigurable synaptic routing. BioCAS 2012: 21-24 - [c2]Theodore Yu, Jongkil Park, Siddharth Joshi, Christoph Maier, Gert Cauwenberghs:
Event-driven neural integration and synchronicity in analog VLSI. EMBC 2012: 775-778 - [c1]Jongkil Park, Theodore Yu, Christoph Maier, Siddharth Joshi, Gert Cauwenberghs:
Live demonstration: Hierarchical Address-Event Routing architecture for reconfigurable large scale neuromorphic systems. ISCAS 2012: 707-711
Coauthor Index
Clemens JS Schaefer
aka: Clemens J. S. Schaefer
aka: Clemens J. S. Schaefer
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