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ORCIDJenq Kuen Lee
Jenq-Kuen Lee
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- affiliation: National Tsing-Hua University, Department of Computer Sciencem, Taiwan
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2020 – today
- 2025
[j57]Che-Chia Lin
, Wei-Hsu Chu, Chia-Hsuan Chang, Hui-Hsin Liao, Chun-Chieh Yang, Jenq-Kuen Lee, Yi-Ping You, Tien-Yuan Hsieh:
Support of MISRA C++ Analyzer for Reliability of Embedded Systems. ACM Trans. Cyber Phys. Syst. 9(1): 9:1-9:27 (2025)- [j56]Meng-Shiun Yu, Hao-Chun Chang, Chong-Teng Wang, Yu-Wei Tien, Tai-Liang Chen, Jenq-Kuen Lee:
Optimizing computer vision algorithms with TVM on VLIW architecture based on RVV. J. Supercomput. 81(1): 172 (2025) - 2024
- [j55]Meng-Shiun Yu, Chuan-Yue Yuan, Tai-Liang Chen, Jenq-Kuen Lee:
Case Study: Optimization Methods With TVM Hybrid-OP on RISC-V Packed SIMD. IEEE Access 12: 64193-64211 (2024) - [c90]Chia-Chen Hsu, Chun-Lin Huang, Chao-Lin Lee, Jenq-Kuen Lee, Pei-Hung Lin:
The Rewriting of DataRaceBench Benchmark for OpenCL Program Validations. ICPP Workshops 2024: 15-22 - [c89]Jhih-Kuan Lin, Yu-Lun Yang, Hung-Ming Lai, Jenq-Kuen Lee:
Rewriting and Optimizing Vector Length Agnostic Intrinsics from Arm SVE to RVV. ICPP Workshops 2024: 38-47 - [c88]Yi-Fan Chen, Yu-Jen Chang, Ching-Te Chiu, Ming-Long Huang, Geng-Ming Liang, Chao-Lin Lee, Jenq-Kuen Lee, Ping-Yu Hsieh, Wei-Chih Lai:
Low DRAM Memory Access and Flexible Dataflow Convolutional Neural Network Accelerator based on RISC-V Custom Instruction. ISCAS 2024: 1-5 - 2023
- [j54]Chao-Lin Lee, Chun-Ping Chung, Sheng-Yuan Cheng, Jenq-Kuen Lee, Robert Lai:
Accelerating AI performance with the incorporation of TVM and MediaTek NeuroPilot. Connect. Sci. 35(1) (2023) - [j53]Chun-Chieh Yang, Yi-Ru Chen, Hui-Hsin Liao, Yuan-Ming Chang, Jenq-Kuen Lee:
Auto-tuning Fixed-point Precision with TVM on RISC-V Packed SIMD Extension. ACM Trans. Design Autom. Electr. Syst. 28(3): 33:1-33:21 (2023) - [j52]Kuan-Hsun Chen, Yung-Chia Lin, Jenq-Kuen Lee:
Guest Editorial: Special Issue on Systems Optimizations for DSP and AI Applications. J. Signal Process. Syst. 95(5): 569-570 (2023) - [j51]Chao-Lin Lee, Chen-Ting Chao, Wei-Hsu Chu, Ming-Yu Hung, Jenq-Kuen Lee:
Accelerating AI Applications with Sparse Matrix Compression in Halide. J. Signal Process. Syst. 95(5): 609-622 (2023) - [c87]Hung-Ming Lai, Jenq-Kuen Lee, Yuan-Shin Hwang:
Enhancing LLVM Optimizations for Linear Recurrence Programs on RVV. ICPP Workshops 2023: 79-87 - [c86]Geng-Ming Liang, Chao-Lin Lee, Robert Lai, Jenq-Kuen Lee:
Support of Sparse Tensor Computing for MLIR HLS. ICPP Workshops 2023: 88-95 - [i2]Jia-Hui Su, Chen-Hua Lu, Jenq-Kuen Lee, Andrea Coluccio, Fabrizio Riente, Marco Vacca, Marco Ottavi, Kuan-Hsun Chen:
Simulation Environment with Customized RISC-V Instructions for Logic-in-Memory Architectures. CoRR abs/2303.12128 (2023) - [i1]Ju-Hung Li, Jhih-Kuan Lin, Yung-Cheng Su, Chi-Wei Chu, Lai-Tak Kuok, Hung-Ming Lai, Chao-Lin Lee, Jenq-Kuen Lee:
SIMD Everywhere Optimization from ARM NEON to RISC-V Vector Extensions. CoRR abs/2309.16509 (2023) - 2022
- [j50]Tai-Liang Chen, I-An Su, Jenq-Kuen Lee:
Case Study: Design Strategies for Enabling Visual Application Blocks of Bluetooth Library. IEEE Access 10: 52630-52654 (2022) - [j49]Kuan-Hsun Chen, Chiahui Su, Christian Hakert, Sebastian Buschjäger, Chao-Lin Lee, Jenq-Kuen Lee, Katharina Morik, Jian-Jia Chen:
Efficient Realization of Decision Trees for Real-Time Inference. ACM Trans. Embed. Comput. Syst. 21(6): 68:1-68:26 (2022) - [c85]Meng-Shiuan Shih, Hung-Ming Lai, Chao-Lin Lee, Chung-Kai Chen, Jenq-Kuen Lee:
Register-Pressure Aware Predicator for Length Multiplier of RVV. ICPP Workshops 2022: 10:1-10:9 - [c84]Sheng-Yuan Cheng, Chun-Ping Chung, Robert Lai, Jenq-Kuen Lee:
Application Showcases for TVM with NeuroPilot on Mobile Devices. ICPP Workshops 2022: 11:1-11:8 - [c83]Geng-Ming Liang, Chuan-Yue Yuan, Meng-Shiun Yuan, Tai-Liang Chen, Kuan-Hsun Chen, Jenq-Kuen Lee:
The Support of MLIR HLS Adaptor for LLVM IR. ICPP Workshops 2022: 12:1-12:8 - [c82]Hung-Ming Lai, Jenq-Kuen Lee:
Efficient Support of the Scan Vector Model for RISC-V Vector Extension. ICPP Workshops 2022: 15:1-15:8 - [c81]Po-Yao Chang, Tai-Liang Chen, Yu-Tse Huang, Meng-Shiun Yu, Jenq-Kuen Lee:
C++OpenCL4TVM: Support C++OpenCL Kernel for TVM NN Operators. IWOCL 2022: 27:1-27:2 - 2021
- [j48]Tai-Liang Chen, Yi-Ru Chen, Meng-Shiun Yu, Jenq-Kuen Lee:
NNBlocks: a Blockly framework for AI computing. J. Supercomput. 77(8): 8622-8652 (2021) - [j47]Yuan-Ming Chang, Chia-Yu Sung, Yu-Chien Sheu, Meng-Shiun Yu, Min-Yih Hsu, Jenq-Kuen Lee:
Support NNEF execution model for NNAPI. J. Supercomput. 77(9): 10065-10096 (2021) - [j46]Shao-Chung Wang, Lin-Ya Yu, Li-An Her, Yuan-Shin Hwang, Jenq-Kuen Lee:
Pointer-Based Divergence Analysis for OpenCL 2.0 Programs. ACM Trans. Parallel Comput. 8(4): 20:1-20:23 (2021) - [c80]Che-Chia Lin, Chao-Lin Lee, Jenq-Kuen Lee, Howard Wang, Ming-Yu Hung:
Accelerate Binarized Neural Networks with Processing-in-Memory Enabled by RISC-V Custom Instructions. ICPP Workshops 2021: 15:1-15:8 - [c79]Hui-Hsin Liao, Chao-Lin Lee, Jenq-Kuen Lee, Wei-Chih Lai, Ming-Yu Hung, Chung-Wen Huang:
Support Convolution of CNN with Compression Sparse Matrix Multiplication Flow in TVM. ICPP Workshops 2021: 17:1-17:7 - [c78]Po-Yao Chang, Tai-Liang Chen, Jenq-Kuen Lee:
Enabling the Use of C++20 Unseq Execution Policy for OpenCL. IWOCL 2021: 22:1-22:2 - 2020
- [j45]Chao-Lin Lee, Min-Yih Hsu, Bing-Sung Lu, Ming-Yu Hung, Jenq-Kuen Lee:
Experiment and enabled flow for GPGPU-Sim simulators with fixed-point instructions. J. Syst. Archit. 111: 101783 (2020) - [c77]Ming-Yi Lai, Chia-Yu Sung, Jenq-Kuen Lee, Ming-Yu Hung:
Enabling Android NNAPI Flow for TVM Runtime. ICPP Workshops 2020: 3:1-3:8 - [c76]Chen-Ting Chao, Wei-Hsu Chu, Chao-Lin Lee, Jenq-Kuen Lee, Ming-Yu Hung, Hsiang-Wei Sung:
Devise Sparse Compression Schedulers to Enhance FastText Methods. ICPP Workshops 2020: 4:1-4:8 - [c75]Meng-Shiun Yu, Tai-Liang Chen, Jenq-Kuen Lee:
Accelerating NNEF Framework on OpenCL Devices Using clDNN. IWOCL 2020: 20:1-20:2 - [c74]Yi-Ru Chen, Hui-Hsin Liao, Chia-Hsuan Chang, Che-Chia Lin, Chao-Lin Lee, Yuan-Ming Chang, Chun-Chieh Yang, Jenq-Kuen Lee:
Experiments and optimizations for TVM on RISC-V Architectures with P Extension. VLSI-DAT 2020: 1-4
2010 – 2019
- 2019
- [j44]Yung-Chia Lin, Jenq-Kuen Lee, François Bodin:
Guest Editorial: Special Issue on Embedded Multicore Applications and Optimization. J. Signal Process. Syst. 91(3-4): 217-218 (2019) - [j43]Chun-Chieh Yang, Shao-Chung Wang, Min-Yih Hsu, Yuan-Ming Chang, Yuan-Shin Hwang, Jenq-Kuen Lee:
Support OpenCL 2.0 Compiler on LLVM for PTX Simulators. J. Signal Process. Syst. 91(3-4): 261-271 (2019) - [c73]Heng Lin, Piyo Chen, Yuan-Shin Hwang, Jenq-Kuen Lee:
Devise Rust Compiler Optimizations on RISC-V Architectures with SIMD Instructions. ICPP Workshops 2019: 13:1-13:7 - [c72]Chao-Lin Lee, Chen-Ting Chao, Jenq-Kuen Lee, Ming-Yu Hung, Chung-Wen Huang:
Accelerate DNN Performance with Sparse Matrix Compression in Halide. ICPP Workshops 2019: 14:1-14:6 - [c71]Chia-Hsuan Chang, Chun-Chieh Yang, Jenq-Kuen Lee, Yung-Chia Lin:
Case Study: Support OpenCL Complex Class for Baseband Computing. IWOCL 2019: 23:1-23:2 - [c70]Chao-Lin Lee, Chen-Ting Chao, Jenq-Kuen Lee, Chung-Wen Huang, Ming-Yu Hung:
Sparse-Matrix Compression Primitives with OpenCL Framework to Support Halide. IWOCL 2019: 24:1-24:2 - 2018
- [j42]Shao-Chung Wang, Li-Chen Kan, Chao-Lin Lee, Yuan-Shin Hwang, Jenq-Kuen Lee:
Architecture and Compiler Support for GPUs Using Energy-Efficient Affine Register Files. ACM Trans. Design Autom. Electr. Syst. 23(2): 18:1-18:25 (2018) - [c69]Chao-Lin Lee, Min-Yih Hsu, Bing-Sung Lu, Jenq-Kuen Lee:
Enable the Flow for GPGPU-Sim Simulators with Fixed-Point Instructions. ICPP Workshops 2018: 12:1-12:5 - [c68]Wei-Cheng Liao, Yuan-Ming Chang, Shao-Chung Wang, Chun-Chieh Yang, Jenq-Kuen Lee, Yuan-Shin Hwang:
Scheduling Methods to Optimize Dependent Programs for GPU Architecture. ICPP Workshops 2018: 13:1-13:8 - [c67]Shih-Huan Chien, Yuan-Ming Chang, Chun-Chieh Yang, Yuan-Shin Hwang, Jenq-Kuen Lee:
Graph Support and Scheduling for OpenCL on Heterogeneous Multi-core Systems. ICPP Workshops 2018: 14:1-14:7 - [c66]Tai-Liang Chen, Shih-Huan Chien, Jenq-Kuen Lee:
ViennaCL++: Enable TensorFlow/Eigen via ViennaCL with OpenCL C++ Flow. IWOCL 2018: 28:1-28:2 - 2017
- [j41]Yuan-Ming Chang, Shao-Chung Wang, Chun-Chieh Yang, Yuan-Shin Hwang, Jenq-Kuen Lee:
Enabling PoCL-based runtime frameworks on the HSA for OpenCL 2.0 support. J. Syst. Archit. 81: 71-82 (2017) - [c65]Lin-Ya Yu, Shao-Chung Wang, Jenq Kuen Lee:
Hierarchical Read/Write Analysis for Pointer-Based OpenCL Programs on RRAM. ICPP Workshops 2017: 45-52 - [c64]Chun-Chieh Yang, Shao-Chung Wang, Min-Yih Hsu, Yuan-Ming Chang, Yuan-Shin Hwang, Jenq-Kuen Lee:
OpenCL 2.0 Compiler Adaptation on LLVM for PTX Simulators. ICPP Workshops 2017: 53-58 - [c63]Li Wang, Ren-Wei Tsai, Shao-Chung Wang, Kun-Chih Chen, Po-Han Wang, Hsiang-Yun Cheng, Yi-Chung Lee, Sheng-Jie Shu, Chun-Chieh Yang, Min-Yih Hsu, Li-Chen Kan, Chao-Lin Lee, Tzu-Chieh Yu, Rih-Ding Peng, Chia-Lin Yang, Yuan-Shin Hwang, Jenq Kuen Lee, Shiao-Li Tsao, Ming Ouhyoung:
Analyzing OpenCL 2.0 workloads using a heterogeneous CPU-GPU simulator. ISPASS 2017: 127-128 - 2016
- [j40]Yu-Te Lin, Jenq Kuen Lee:
Vector data flow analysis for SIMD optimizations on OpenCL programs. Concurr. Comput. Pract. Exp. 28(5): 1629-1654 (2016) - [j39]Yu-Chuan Guo, Wuu Yang, Jiunn-Yeu Chen, Jenq-Kuen Lee:
Translating the ARM Neon and VFP instructions in a binary translator. Softw. Pract. Exp. 46(12): 1591-1615 (2016) - [c62]Shao-Chung Wang, Li-Chen Kan, Yuan-Shin Hwang, Jenq Kuen Lee:
Energy Efficient Affine Register File for GPU Microarchitecture. ICPP Workshops 2016: 52-58 - [c61]Hsiang-Wei Sung, Yuan-Ming Chang, Shao-Chung Wang, Jenq Kuen Lee:
OpenCV Optimization on Heterogeneous Multi-core Systems for Gesture Recognition Applications. ICPP Workshops 2016: 59-65 - [c60]Wen-Li Shih, Cheng-Yen Lin, Ming-Yu Hung, Jenq Kuen Lee:
A Probabilistic Framework for Compiler Optimization with Multithread Power-Gating Controls. ICPP Workshops 2016: 281-288 - 2015
- [j38]Cheng-Yen Lin, Chung-Wen Huang, Chi-Bang Kuan, Shi-Yu Huang, Jenq Kuen Lee:
The Design and Experiments of A SID-Based Power-Aware Simulator for Embedded Multicore Systems. ACM Trans. Design Autom. Electr. Syst. 20(2): 22:1-22:27 (2015) - [j37]Jenq Kuen Lee, Albert Cohen, Roy Ju, Kuan-Ching Li:
Guest Editorial: Embedded Multicore Systems and Applications. J. Signal Process. Syst. 80(3): 241-243 (2015) - [j36]Cheng-Yen Lin, Chi-Bang Kuan, Wen-Li Shih, Jenq Kuen Lee:
Compilers for Low Power with Design Patterns on Embedded Multicore Systems. J. Signal Process. Syst. 80(3): 277-293 (2015) - 2014
- [j35]Chung-Ju Wu, Chia-Han Lu, Jenq Kuen Lee:
Register spilling via transformed interference equations for PAC DSP architecture. Concurr. Comput. Pract. Exp. 26(3): 779-799 (2014) - [j34]Chia-Han Lu, Wen-Li Shih, Chung-Ju Wu, Jenq Kuen Lee:
Achieving spilling-friendly register file assignment for highly distributed register files. J. Supercomput. 69(3): 1342-1362 (2014) - [j33]Wen-Li Shih, Yi-Ping You, Chung-Wen Huang, Jenq Kuen Lee:
Compiler Optimization for Reducing Leakage Power in Multithread BSP Programs. ACM Trans. Design Autom. Electr. Syst. 20(1): 9:1-9:34 (2014) - [j32]Shang-Hong Lai, Jenq Kuen Lee, Branislav Kisacanin:
Guest Editorial: Multi-Core Embedded Computing for Signal Processing. J. Signal Process. Syst. 75(2): 93-94 (2014) - [j31]Chi-Bang Kuan, Jia-Jhe Li, Chung-Kai Chen, Jenq Kuen Lee:
C++ Support and Applications for Embedded Multicore DSP Systems. J. Signal Process. Syst. 75(2): 109-122 (2014) - [c59]Chia-Chen Hsu, Cheng-Yen Lin, Shin-Kai Chen, Chih-Wei Liu, Jenq Kuen Lee:
Optimized memory access support for data layout conversion on heterogeneous multi-core systems. ESTIMedia 2014: 128-137 - [c58]Li-Wei Kuo, Chun-Chieh Yang, Jenq Kuen Lee, Shau-Yin Tseng:
The design of LLVM-based shader compiler for embedded architecture. ICPADS 2014: 961-968 - [c57]Wuu Yang, Ming-Hsiang Huang, Jenq-Kuen Lee:
On the and-or-scheduling problems. ICPADS 2014: 969-974 - 2013
- [c56]Kai-Mao Cheng, Cheng-Yen Lin, Yu-Chun Chen, Te-Feng Su, Shang-Hong Lai, Jenq Kuen Lee:
Design of vehicle detection methods with OpenCL programming on multi-core systems. ESTIMedia 2013: 88-95 - [c55]Cheng-Yen Lin, Chi-Bang Kuan, Jenq Kuen Lee:
Compilers for Low Power with Design Patterns on Embedded Multicore Systems. ICPP 2013: 1052-1060 - 2012
- [j30]Chi-Bang Kuan, Jenq Kuen Lee:
Compiler supports for VLIW DSP processors with SIMD intrinsics. Concurr. Comput. Pract. Exp. 24(5): 517-532 (2012) - [j29]Kun-Yuan Hsieh, Chi-Hua Lai, Shang-Hong Lai, Jenq Kuen Lee:
Parallelization of Belief Propagation on Cell Processors for Stereo Vision. ACM Trans. Embed. Comput. Syst. 11(S1): 13 (2012) - [j28]Jia-Jhe Li, Chung-Kai Chen, Tung-Yu Wu, Jenq Kuen Lee:
Case study: stereo vision experiments with multi-core software API on embedded MPSoC environments. J. Supercomput. 61(1): 103-117 (2012) - [j27]Chung-Ju Wu, Yu-Te Lin, Jenq Kuen Lee:
Instruction scheduling methods and phase ordering framework for VLIW DSP processors with distributed register files. J. Supercomput. 61(3): 1024-1047 (2012) - [j26]Ming-Yu Hung, Peng-Sheng Chen, Yuan-Shin Hwang, Roy Dz-Ching Ju, Jenq Kuen Lee:
Support of Probabilistic Pointer Analysis in the SSA Form. IEEE Trans. Parallel Distributed Syst. 23(12): 2366-2379 (2012) - [c54]Jia-Jhe Li, Chi-Bang Kuan, Tung-Yu Wu, Jenq Kuen Lee:
Enabling an OpenCL Compiler for Embedded Multicore DSP Systems. ICPP Workshops 2012: 545-552 - 2011
- [j25]David Chih-Wei Chang, Tay-Jyi Lin, Chung-Ju Wu, Jenq Kuen Lee, Yuan-Hua Chu, An-Yeu Wu:
Parallel Architecture Core (PAC) - the First Multicore Application Processor SoC in Taiwan Part I: Hardware Architecture & Software Development Tools. J. Signal Process. Syst. 62(3): 373-382 (2011) - [c53]Yu-Hao Chang, Chi-Bang Kuan, Cheng-Yen Lin, Te-Feng Su, Chun-Ta Chen, Jyh-Shing Roger Jang, Shang-Hong Lai, Jenq Kuen Lee:
Support of software framework for embedded multi-core systems with Android environments. ESTIMedia 2011: 2-8 - [c52]Chi-Bang Kuan, Shao-Chung Wang, Wen-Li Shih, Kun-Hsien Tsai, Shang-Hong Lai, Jenq Kuen Lee:
Parallelization of a Bokeh application on embedded multicore DSP systems. ESTIMedia 2011: 93-101 - [c51]Pangfeng Liu, Greg C. Lee, Jenq-Kuen Lee, Cheng-Yen Lin:
Innovative system and application curriculum on multicore systems. WESE 2011: 25-31 - [c50]Yu-Te Lin, Shao-Chung Wang, Wen-Li Shih, Brian Kun-Yuan Hsieh, Jenq Kuen Lee:
Enable OpenCL Compiler with Open64 Infrastructures. HPCC 2011: 863-868 - [c49]Chi-Bang Kuan, Jia-Jhe Li, Chung-Kai Chen, Jenq Kuen Lee:
C++ Compiler Supports for Embedded Multicore DSP Systems. ICPP Workshops 2011: 214-221 - [r1]Jenq Kuen Lee, Rong-Guey Chang, Chi-Bang Kuan:
Array Languages, Compiler Techniques for. Encyclopedia of Parallel Computing 2011: 75-87 - 2010
- [j24]Chung-Wen Huang, Wen-Li Shih, Chung-Ju Wu, Jia-Jhe Li, Jenq Kuen Lee:
Programming model and tools for embedded multicore systems. Int. J. Embed. Syst. 4(3/4): 259-269 (2010) - [c48]Cheng-Yen Lin, Po-Yu Chen, Chun-Kai Tseng, Chung-Wen Huang, Chia-Chieh Weng, Chi-Bang Kuan, Shih-Han Lin, Shi-Yu Huang, Jenq Kuen Lee:
Power aware SID-based simulator for embedded multicore DSP subsystems. CODES+ISSS 2010: 95-104 - [c47]Meng-Ting Wang, Po-Chun Huang, Jenq Kuen Lee, Shang-Hong Lai, Jyh-Shing Roger Jang, Chun-Fa Chang, Chih-Wei Liu, Tei-Wei Kuo, Steve Liao:
Support of Android lab modules for embedded system curriculum. WESE 2010: 4 - [c46]Jia-Jhe Li, Shao-Chung Wang, Po-Chun Hsu, Po-Yu Chen, Jenq Kuen Lee:
A Multi-core Software API for Embedded MPSoC Environments. MTPP 2010: 40-50
2000 – 2009
- 2009
- [j23]Chia-Han Lu, Yung-Chia Lin, Yi-Ping You, Jenq Kuen Lee:
LC-GRFA: global register file assignment with local consciousness for VLIW DSP processors with non-uniform register files. Concurr. Comput. Pract. Exp. 21(1): 101-114 (2009) - [c45]Chung-Wen Huang, Kun-Yuan Hsieh, Jia-Jhe Li, Jenq Kuen Lee:
Support of Paged Register Files for Improving Context Switching on Embedded Processors. CSE (2) 2009: 352-357 - [c44]Shou-Wei Chang, Kun-Yuan Hsieh, Jenq Kuen Lee:
pTest: An adaptive testing tool for concurrent software on embedded multicore processors. DATE 2009: 1012-1017 - [c43]Chung-Wen Huang, Wei-Kuan Shih, Yarsun Hsu, Jenq Kuen Lee:
Configurable SID-based multi-core simulators for embedded system education. WESE@ESWEEK 2009: 64-70 - [c42]Chia-Ming Cheng, Shu-Jyuan Lin, Shang-Hong Lai, Jenq Kuen Lee:
Efficient multiple virtual view generation based on reduced depth stereo image for advanced autostereoscopic displays. ICME 2009: 241-244 - 2008
- [j22]Chung-Kai Chen, Cheng-Wei Chen, Chien-Tan Ko, Jenq Kuen Lee, Jyh-Cheng Chen:
Mobile Java RMI support over heterogeneous wireless networks: A case study. J. Parallel Distributed Comput. 68(11): 1425-1436 (2008) - [j21]Chih-Chieh Yang, Chung-Kai Chen, Yu-Hao Chang, Kai-Hsin Chung, Jenq Kuen Lee:
Software architecture design for streaming Java RMI. Sci. Comput. Program. 70(2-3): 168-184 (2008) - [j20]Kun-Yuan Hsieh, Yung-Chia Lin, Chien-Ching Huang, Jenq Kuen Lee:
Enhancing Microkernel Performance on VLIW DSP Processors via Multiset Context Switch. J. Signal Process. Syst. 51(3): 257-268 (2008) - [j19]Yung-Chia Lin, Chia-Han Lu, Chung-Ju Wu, Chung-Lin Tang, Yi-Ping You, Ya-Chiao Moo, Jenq Kuen Lee:
Effective Code Generation for Distributed and Ping-Pong Register Files: A Case Study on PAC VLIW DSP Cores. J. Signal Process. Syst. 51(3): 269-288 (2008) - [c41]Chi-Hua Lai, Kun-Yuan Hsieh, Shang-Hong Lai, Jenq Kuen Lee:
Parallelization of belief propagation method on embedded multicore processors for stereo vision. ESTIMedia 2008: 39-44 - [c40]Kun-Yuan Hsieh, Yen-Chih Liu, Po-Wen Wu, Shou-Wei Chang, Jenq Kuen Lee:
Enabling Streaming Remoting on Embedded Dual-Core Processors. ICPP 2008: 35-42 - [c39]Kun-Yuan Hsieh, Yen-Chih Liu, Chi-Hua Lai, Jenq Kuen Lee:
The support of software design patterns for streaming RPC on embedded multicore processors. SiPS 2008: 263-268 - 2007
- [j18]Yung-Chia Lin, Yi-Ping You, Jenq Kuen Lee:
PALF: compiler supports for irregular register files in clustered VLIW DSP processors. Concurr. Comput. Pract. Exp. 19(18): 2391-2406 (2007) - [j17]Chung-Kai Chen, Yu-Hao Chang, Yu-Tin Chen, Chih-Chieh Yang, Jenq Kuen Lee:
Switching supports for stateful object remoting on network processors. J. Supercomput. 40(3): 281-298 (2007) - [j16]Yung-Chia Lin, Yi-Ping You, Chung-Wen Huang, Jenq Kuen Lee, Wei-Kuan Shih, TingTing Hwang:
Energy-aware scheduling and simulation methodologies for parallel security processors with multiple voltage domains. J. Supercomput. 42(2): 201-223 (2007) - [j15]Yi-Ping You, Chung-Wen Huang, Jenq Kuen Lee:
Compilation for compact power-gating controls. ACM Trans. Design Autom. Electr. Syst. 12(4): 51 (2007) - [c38]Chung-Kai Chen, Ling-Hua Tseng, Shih-Chang Chen, Young-Jia Lin, Yi-Ping You, Chia-Han Lu, Jenq Kuen Lee:
Enabling compiler flow for embedded VLIW DSP processors with distributed register files. LCTES 2007: 146-148 - 2006
- [j14]Yi-Ping You, Chingren Lee, Jenq Kuen Lee:
Compilers for leakage power reduction. ACM Trans. Design Autom. Electr. Syst. 11(1): 147-164 (2006) - [c37]Jia-Ming Chen, Chih-Hao Chang, Shau-Yin Tseng, Jenq Kuen Lee, Wei-Kuan Shih:
Power Aware H.264/AVC Video Player on PAC Dual-Core SoC Platform. EUC 2006: 57-68 - [c36]David Chih-Wei Chang, I-Tao Liao, Jenq Kuen Lee, Wen-Feng Chen, Shau-Yin Tseng, Chein-Wei Jen:
PAC DSP Core and Application Processors. ICME 2006: 289-292 - [c35]Chung-Ju Wu, Sheng-Yuan Chen, Jenq Kuen Lee:
Copy Propagation Optimizations for VLIW DSP Processors with Distributed Register Files. LCPC 2006: 251-266 - [c34]Chih-Chieh Yang, Chung-Kai Chen, Yu-Hao Chang, Kai-Hsin Chung, Jenq Kuen Lee:
Streaming support for Java RMI in distributed environments. PPPJ 2006: 53-61 - [c33]Chi Wu, Kun-Yuan Hsieh, Yung-Chia Lin, Chung-Ju Wu, Wen-Li Shih, Shih-Chang Chen, Chung-Kai Chen, Chien-Ching Huang, Yi-Ping You, Jenq Kuen Lee:
Integrating Compiler and System Toolkit Flow for Embedded VLIW DSP Processors. RTCSA 2006: 215-222 - 2005
- [j13]Pu-Chen Wei, Chung-Hsin Chen, Cheng-Wei Chen, Jenq Kuen Lee:
Support and optimization of Java RMI over a Bluetooth environment. Concurr. Pract. Exp. 17(7-8): 967-989 (2005) - [c32]Yung-Chia Lin, Chung-Wen Huang, Jenq Kuen Lee:
System-level design space exploration for security processor prototyping in analytical approaches. ASP-DAC 2005: 376-380 - [c31]Yi-Ping You, Chung-Wen Huang, Jenq Kuen Lee:
A sink-n-hoist framework for leakage power reduction. EMSOFT 2005: 124-133 - [c30]Chung-Kai Chen, Yu-Hao Chang, Cheng-Wei Chen, Yu-Tin Chen, Chih-Chieh Yang, Jenq Kuen Lee:
Efficient Switching Supports of Distributed .NET Remoting with Network Processors. ICPP 2005: 350-357 - [c29]Yung-Chia Lin, Chung-Lin Tang, Chung-Ju Wu, Ming-Yu Hung, Yi-Ping You, Ya-Chiao Moo, Sheng-Yuan Chen, Jenq Kuen Lee:
Compiler Supports and Optimizations for PAC VLIW DSP Processors. LCPC 2005: 466-474 - 2004
- [j12]Cheng-Wei Chen, Jenq Kuen Lee:
Case study: an infrastructure for C/ATLAS environments with object-oriented design and XML representation. J. Syst. Softw. 71(1-2): 83-95 (2004) - [j11]Rong-Guey Chang, Tyng-Ruey Chuang, Jenq Kuen Lee:
Support and optimization for parallel sparse programs with array intrinsics of Fortran 90. Parallel Comput. 30(4): 527-550 (2004) - [j10]Peng-Sheng Chen, Yuan-Shin Hwang, Roy Dz-Ching Ju, Jenq Kuen Lee:
Interprocedural Probabilistic Pointer Analysis. IEEE Trans. Parallel Distributed Syst. 15(10): 893-907 (2004) - [c28]Cheng-Wei Chen, Chung-Kai Chen, Jyh-Cheng Chen, Chien-Tan Ko, Jenq Kuen Lee, Hong-Wei Lin, Wang-Jer Wu:
Efficient support of java RMI over heterogeneous wireless networks. ICC 2004: 1391-1395 - [c27]Chung-Kai Chen, Cheng-Wei Chen, Jenq Kuen Lee:
Specification and Architecture Supports for Component Adaptations on Distributed Environments. IPDPS 2004 - [c26]Yung-Chia Lin, Yi-Ping You, Chung-Wen Huang, Jenq Kuen Lee, Wei-Kuan Shih, TingTing Hwang:
Power-Aware Scheduling for Parallel Security Processors with Analytical Models. LCPC 2004: 470-484 - 2003
- [j9]Gwan-Hwan Hwang, Cheng-Wei Chen, Jenq Kuen Lee, Roy Dz-Ching Ju:
Segmented Alignment: An Enhanced Model to Align Data Parallel Programs of HPF. J. Supercomput. 25(1): 17-41 (2003) - [j8]Chingren Lee, Jenq Kuen Lee, TingTing Hwang, Shi-Chun Tsai:
Compiler optimization on VLIW instruction scheduling for low power. ACM Trans. Design Autom. Electr. Syst. 8(2): 252-268 (2003) - [c25]Peng-Sheng Chen, Ming-Yu Hung, Yuan-Shin Hwang, Roy Dz-Ching Ju, Jenq Kuen Lee:
Compiler support for speculative multithreading architecture with probabilistic points-to analysis. PPoPP 2003: 25-36 - 2002
- [c24]Cheng-Wei Chen, Chung-Kai Chen, Jenq Kuen Lee:
Building Ontology for Optimization and Composition of Parallel JavaBean Programs. ISPAN 2002: 233-238 - [c23]Pu-Chen Wei, Chung-Hsin Chen, Cheng-Wei Chen, Jenq Kuen Lee:
Support and optimization of Java RMI over bluetooth environments. Java Grande 2002: 237 - [c22]Yi-Ping You, Chingren Lee, Jenq Kuen Lee:
Compiler Analysis and Supports for Leakage Power Reduction on Microprocessors. LCPC 2002: 45-60 - [c21]Yung-Chia Lin, Yuan-Shin Hwang, Jenq Kuen Lee:
Compiler Optimizations with DSP-Specific Semantic Descriptions. LCPC 2002: 75-89 - 2001
- [j7]Gwan-Hwan Hwang, Jenq Kuen Lee, Roy Dz-Ching Ju:
Array Operation Synthesis to Optimize HPF Programs on Distributed Memory Machines. J. Parallel Distributed Comput. 61(4): 467-500 (2001) - [j6]Rong-Guey Chang, Tyng-Ruey Chuang, Jenq Kuen Lee:
Parallel Sparse Supports for Array Intrinsic Functions of Fortran 90. J. Supercomput. 18(3): 305-339 (2001) - [c20]Rong-Guey Chang, Jia-Shin Li, Jenq Kuen Lee, Tyng-Ruey Chuang:
Probabilistic Inference Schemes for Sparsity Structures of Fortran 90 Array Intrinsics. ICPP 2001: 61-68 - [c19]Yuan-Shin Hwang, Peng-Sheng Chen, Jenq Kuen Lee, Roy Dz-Ching Ju:
Probabilistic Points-to Analysis. LCPC 2001: 290-305 - 2000
- [j5]Wei-Kuan Shih, Chung-Der Lin, Yar-Wen Chang, Jenq Kuen Lee:
Real-Time Gang Schedulings With Workload Models for Parallel Computers. J. Inf. Sci. Eng. 16(3): 333-348 (2000) - [c18]Chingren Lee, Jenq Kuen Lee, TingTing Hwang, Shi-Chun Tsai:
Compiler Optimization on Instruction Scheduling for Low Power. ISSS 2000: 55-61 - [c17]Jian-Zhi Wu, Jenq Kuen Lee:
A Bytecode Optimizer to Engineer Bytecodes for Performance. LCPC 2000: 377-382 - [c16]Cheng-Wei Chen, Chung-Kai Chen, Jenq Kuen Lee:
Runtime Compositions and Optimizations of Parallel JavaBean Programs on Clustering Environments. PDPTA 2000
1990 – 1999
- 1999
- [j4]Gwan-Hwan Hwang, Jenq Kuen Lee:
Communication set generations with CSD calculus and expression-rewriting framework. Parallel Comput. 25(9): 1105-1130 (1999) - [c15]Rong-Guey Chang, Tyng-Ruey Chuang, Jenq Kuen Lee:
Compiler Optimizations for Parallel Sparse Programs with Array Intrinsics of Fortran 90. ICPP 1999: 103-111 - 1998
- [j3]Gwan-Hwan Hwang, Jenq Kuen Lee, Roy Dz-Ching Ju:
A Function-Composition Approach to Synthesize Fortran 90 Array Operations. J. Parallel Distributed Comput. 54(1): 1-47 (1998) - [c14]Jenq Kuen Lee, Chung-Der Lin, Yar-Wen Chang, Wei-Kuan Shih:
Real-Time Gang Schedulings with Workload Models for Parallel Computers. ICPADS 1998: 114-121 - [c13]Rong-Guey Chang, Tyng-Ruey Chuang, Jenq Kuen Lee:
Efficient Support of Parallel Sparse Computation for Array Intrinsic Functions of Fortran 90. International Conference on Supercomputing 1998: 45-52 - [c12]Gwan-Hwan Hwang, Jenq Kuen Lee:
An Expression-Rewriting Framework to Generic Communication Sets for HPF Programs with Block-Cyclic Distribution. IPPS/SPDP 1998: 62-68 - 1997
- [j2]Rong-Guey Chang, Cheng-Wei Chen, Tyng-Ruey Chuang, Jenq Kuen Lee:
Towards Automatic Support of Parallel Sparse Computation in Java with Continuous Compilation. Concurr. Pract. Exp. 9(11): 1101-1111 (1997) - [j1]Jenq Kuen Lee, Ing-Kuen Tsaur, San-Yih Hwang:
Parallel Array Object I/O Support on Distributed Environments. J. Parallel Distributed Comput. 40(2): 227-241 (1997) - [c11]Jenq Kuen Lee, Dan Ho, Y. C. Chuang:
Data Distribution Analysis and Optimization for Pointer-Based Distributed Programs. ICPP 1997: 56-63 - [c10]Gwan-Hwan Hwang, Jenq Kuen Lee, Roy Dz-Ching Ju:
Integrating Automatic Data Alignment and Array Operation Synthesis to Optimize Data Parallel Programs. LCPC 1997: 412-415 - [c9]Y. C. Chuang, Jenq Kuen Lee, K. L. Wu, C. A. Lin:
Towards the Parallelisation of Pressure Correction Method on Unstructured Grids. Parallel CFD 1997: 249-256 - [c8]Tyng-Ruey Chuang, Rong-Guey Chang, Jenq Kuen Lee:
Sampling and Analytical Techniques for Data Distribution of Parallel Sparse Computation. PP 1997 - 1996
- [c7]Gwan-Hwan Hwang, Jenq Kuen Lee, Roy Dz-Ching Ju:
Array Operation Synthesis to Optimize HPF Programs. ICPP, Vol. 3 1996: 1-8 - 1995
- [c6]Gwan-Hwan Hwang, Jenq Kuen Lee, Roy Dz-Ching Ju:
An Array Operation Synthesis Scheme to Optimize Fortran 90 Programs. PPoPP 1995: 112-122 - [c5]Jenq Kuen Lee, Ing-Kuen Tsaur, San-Yih Hwang:
Language and Environment Support for Parallel Array Object I/O on Distributed Environments. PP 1995: 756-761 - 1993
- [c4]Janche Sang, Felipe Knop, Vernon Rego, Jenq Kuen Lee, Chung-Ta King:
The Xthreads library: Design, implementation, and applications. COMPSAC 1993: 173-179 - 1992
- [c3]Dennis Gannon, Jenq Kuen Lee, Srinivas Narayana:
On Using Object-Oriented Parallel Programming to Build Distributed Algebraic Abstractions. CONPAR 1992: 769-774 - [c2]Dennis Gannon, Jenq Kuen Lee, Bruce Shei, Sekhar R. Sarukkai, Srinivas Narayana, Neelakantan Sundaresan, Daya Atapattu, François Bodin:
Sigma II: A Tool Kit for Building Parallelizing Compilers and Performance Analysis Systems. Programming Environments for Parallel Computing 1992: 17-36 - 1991
- [c1]Jenq Kuen Lee, Dennis Gannon:
Object oriented parallel programming: experiments and results. SC 1991: 273-282
Coauthor Index
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