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Min-Yih Hsu
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2020 – today
- 2023
- [b1]Min-Yih Hsu:
Efficient Program Analyses that Scale to Large Codebases. University of California, Irvine, USA, 2023 - [c4]Min-Yih Hsu, Felicitas Hetzelt, David Gens, Michael Maitland, Michael Franz:
A Highly Scalable, Hybrid, Cross-Platform Timing Analysis Framework Providing Accurate Differential Throughput Estimation via Instruction-Level Tracing. ESEC/SIGSOFT FSE 2023: 821-831 - 2022
- [i2]Min-Yih Hsu, David Gens, Michael Franz:
MCAD: Beyond Basic-Block Throughput Estimation Through Differential, Instruction-Level Tracing. CoRR abs/2201.04804 (2022) - [i1]Min-Yih Hsu, Felicitas Hetzelt, Michael Franz:
DFI: An Interprocedural Value-Flow Analysis Framework that Scales to Large Codebases. CoRR abs/2209.02638 (2022) - 2021
- [j3]Yuan-Ming Chang, Chia-Yu Sung, Yu-Chien Sheu, Meng-Shiun Yu, Min-Yih Hsu, Jenq-Kuen Lee:
Support NNEF execution model for NNAPI. J. Supercomput. 77(9): 10065-10096 (2021) - 2020
- [j2]Chao-Lin Lee, Min-Yih Hsu, Bing-Sung Lu, Ming-Yu Hung, Jenq-Kuen Lee:
Experiment and enabled flow for GPGPU-Sim simulators with fixed-point instructions. J. Syst. Archit. 111: 101783 (2020)
2010 – 2019
- 2019
- [j1]Chun-Chieh Yang, Shao-Chung Wang, Min-Yih Hsu, Yuan-Ming Chang, Yuan-Shin Hwang, Jenq-Kuen Lee:
Support OpenCL 2.0 Compiler on LLVM for PTX Simulators. J. Signal Process. Syst. 91(3-4): 261-271 (2019) - 2018
- [c3]Chao-Lin Lee, Min-Yih Hsu, Bing-Sung Lu, Jenq-Kuen Lee:
Enable the Flow for GPGPU-Sim Simulators with Fixed-Point Instructions. ICPP Workshops 2018: 12:1-12:5 - 2017
- [c2]Chun-Chieh Yang, Shao-Chung Wang, Min-Yih Hsu, Yuan-Ming Chang, Yuan-Shin Hwang, Jenq-Kuen Lee:
OpenCL 2.0 Compiler Adaptation on LLVM for PTX Simulators. ICPP Workshops 2017: 53-58 - [c1]Li Wang, Ren-Wei Tsai, Shao-Chung Wang, Kun-Chih Chen, Po-Han Wang, Hsiang-Yun Cheng, Yi-Chung Lee, Sheng-Jie Shu, Chun-Chieh Yang, Min-Yih Hsu, Li-Chen Kan, Chao-Lin Lee, Tzu-Chieh Yu, Rih-Ding Peng, Chia-Lin Yang, Yuan-Shin Hwang, Jenq Kuen Lee, Shiao-Li Tsao, Ming Ouhyoung:
Analyzing OpenCL 2.0 workloads using a heterogeneous CPU-GPU simulator. ISPASS 2017: 127-128
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