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ORCIDC. André T. Salama
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2000 – 2009
- 2007
[c21]Mohamed Kawokgy, C. André T. Salama:
A low-power CSCD asynchronous viterbi decoder for wireless applications. ISLPED 2007: 363-366- 2005
- [c20]Farsheed Mahmoudi, C. André T. Salama:
8 GHz tunable CMOS quadrature generator using differential active inductors. ISCAS (3) 2005: 2112-2115 - 2004
- [j20]Farhang Vessal, C. André T. Salama:
An 8-bit 2-Gsample/s folding-interpolating analog-to-digital converter in SiGe technology. IEEE J. Solid State Circuits 39(1): 238-241 (2004) - [j19]Sotoudeh Hamedi-Hagh, C. André T. Salama:
CMOS wireless phase-shifted transmitter. IEEE J. Solid State Circuits 39(8): 1241-1252 (2004) - [c19]Mohamed Kawokgy, C. André T. Salama:
Low-power asynchronous viterbi decoder for wireless applications. ISLPED 2004: 286-289 - [c18]Sotoudeh Hamedi-Hagh, C. André T. Salama:
CMOS phase shifted transmitters for 4G wireless systems. PIMRC 2004: 175-179 - 2003
- [j18]Dusan Suvakovic, C. André T. Salama:
Energy Efficient Adiabatic Multiplier-Accumulator Design. J. VLSI Signal Process. 33(1-2): 83-103 (2003) - [c17]Sotoudeh Hamedi-Hagh, C. André T. Salama:
A 1 V, 8 GHz CMOS integrated phase shifted transmitter for wideband and varying envelope communication systems. CICC 2003: 447-450 - [c16]M. Ramezani, C. André T. Salama:
A 10Gb/s CDR with a half-rate bang-bang phase detector. ISCAS (2) 2003: 181-184 - [c15]Sotoudeh Humedi-Hugh, C. André T. Salama:
A novel C-band CMOS phase shifter for communication systems. ISCAS (2) 2003: 316-319 - [c14]Farhang Vessal, C. André T. Salama:
An 8-bit 2-GSample/s analog-to-digital converter in 0.5µm SiGe technology. ISCAS (1) 2003: 893-896 - 2002
- [c13]Farhang Vessal, C. André T. Salama:
A bipolar 2-GSample/s track-and-hold amplifier (THA) in 0.35 μm SiGe technology. ISCAS (5) 2002: 573-576 - 2001
- [c12]Sotoudeh Hamedi-Hagh, C. André T. Salama:
A 10 bit, 50 M sample/s, low power pipelined A/D converter for cable modem applications. ISCAS (1) 2001: 424-427 - [c11]Mehrdad Ramezani, C. André T. Salama:
An improved bang-bang phase detector for clock and data recovery applications. ISCAS (1) 2001: 715-718 - [c10]Song Ye, Koji Yano, C. André T. Salama:
1 V, 1.9 GHz mixer using a lateral bipolar transistor in CMOS. ISLPED 2001: 112-116 - 2000
- [j17]Hormoz Djahanshahi, C. André T. Salama:
Differential CMOS circuits for 622-MHz/933-MHz clock and data recovery applications. IEEE J. Solid State Circuits 35(6): 847-855 (2000) - [c9]Dusan Suvakovic, C. André T. Salama:
A pipelined multiply-accumulate unit design for energy recovery DSP systems. ISCAS 2000: 16-19
1990 – 1999
- 1999
- [j16]Hormoz Djahanshahi, Flemming Hansen, C. André T. Salama:
Gigabit-per-second, ECL-compatible I/O interface in 0.35-μm CMOS. IEEE J. Solid State Circuits 34(8): 1074-1083 (1999) - [c8]Hormoz Djahanshahi, Flemming Hansen, C. André T. Salama:
Giga bit per second per pin differential CMOS circuits for pseudo ECL signaling. CICC 1999: 601-604 - [c7]Hormoz Djahanshahi, C. André T. Salama:
Differential 0.35µm CMOS circuits for 622 MHz/933 MHz monolithic clock and data recovery applications. ISCAS (2) 1999: 93-96 - 1998
- [j15]Mehran Aliahmad, C. André T. Salama:
Integration of a short-loop SLIC in a low-voltage submicron BiCMOS technology. IEEE J. Solid State Circuits 33(6): 850-858 (1998) - [c6]Dusan Suvakovic, C. André T. Salama:
Guidelines for Use of Registers and Multiplexers in Low Power Low Voltage DSP Systems. Great Lakes Symposium on VLSI 1998: 26-29 - [c5]Hormoz Djahanshahi, Flemming Hansen, C. André T. Salama:
High-speed ECL-compatible serial I/O in 0.35 μm CMOS. ICECS 1998: 59-62 - 1997
- [j14]Tirdad Sowlati, Yuriy M. Greshishchev, C. André T. Salama:
Phase-correcting feedback system for class E power amplifier. IEEE J. Solid State Circuits 32(4): 544-549 (1997) - 1996
- [j13]Oscar M. K. Law, C. André T. Salama:
GaAs Schmitt trigger memory cell design. IEEE J. Solid State Circuits 31(8): 1190-1192 (1996) - [j12]Oscar M. K. Law, C. André T. Salama:
GaAs dynamic memory design. IEEE J. Solid State Circuits 31(8): 1193-1196 (1996) - 1995
- [j11]Tirdad Sowlati, C. André T. Salama, John Sitch, Gord Rabjohn, David Smith:
Low voltage, high efficiency GaAs Class E power amplifiers for wireless transmitters. IEEE J. Solid State Circuits 30(10): 1074-1080 (1995) - [c4]Tirdad Sowlati, Yuriy M. Greshishchev, C. André T. Salama, Gord Rabjohn, John Sitch:
Linear transmitter design using high efficiency Class E power amplifier. PIMRC 1995: 1233 - 1994
- [j10]Oscar M. K. Law, C. André T. Salama:
GaAs split phase dynamic logic. IEEE J. Solid State Circuits 29(5): 617-622 (1994) - [c3]Keng Leong Fong, C. André T. Salama:
Low-Power Current-Mode Algorithmic ADC. ISCAS 1994: 473-476 - 1993
- [c2]Keng Leong Fong, C. André T. Salama:
A 10 Bit Semi-Algorithmic Current Mode DAC. ISCAS 1993: 978-981 - [c1]Shuo Xiao, C. André T. Salama:
Voltage Gain Enhancement by Conductance Cancellation in GaAs MESFET Opamps. ISCAS 1993: 1073-1076 - 1992
- [j9]Chu Phoon Chong, C. André T. Salama, Kenneth Carless Smith:
An imager with built-in image-velocity computation capability. IEEE Trans. Circuits Syst. Video Technol. 2(3): 306-312 (1992) - [j8]Chu Phoon Chong, C. André T. Salama, Kenneth Carless Smith:
A novel technique for image-velocity computation. IEEE Trans. Circuits Syst. Video Technol. 2(3): 313-318 (1992) - 1991
- [j7]David H. K. Hoe, C. André T. Salama:
GaAs pipelined dynamic logic. Integr. 12(1): 93-105 (1991) - 1990
- [j6]David G. Nairn, C. André T. Salama:
Current-mode algorithmic analog-to-digital converters. IEEE J. Solid State Circuits 25(4): 997-1004 (1990)
1980 – 1989
- 1989
- [j5]Kenneth J. Schultz, David H. K. Hoe, C. André T. Salama:
A microprogrammable processor using single poly EPROM. Integr. 8(2): 189-199 (1989) - [j4]David H. K. Hoe, Kenneth J. Schultz, C. André T. Salama, Robert A. Hadaway, Paul Kempf:
Cell and circuit design for single-poly EPROM. IEEE J. Solid State Circuits 24(4): 1153-1157 (1989) - 1987
- [j3]A. S. Shubat, J. A. Pretorias, C. André T. Salama:
Expandable arithmetic block macrocell. Integr. 5(1): 47-71 (1987) - [j2]S. L. Wong, C. André T. Salama:
Improved Simulation of p- and n-channel MOSFET's Using an Enhanced SPICE MOS3 Model. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 6(4): 586-591 (1987)
1960 – 1969
- 1964
- [j1]Michael P. Beddoes, C. André T. Salama:
Series Connected Tunnel-Diode Multilevel Register. IEEE Trans. Electron. Comput. 13(3): 308-309 (1964)
Coauthor Index
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