default search action
Google
Google Scholar
Semantic Scholar
Internet Archive Scholar
CiteSeerX
ORCIDZhe Lin 0007
Person information
- affiliation: Hong Kong University of Science and Technology, Department of Electronic and Computer Engineering, Hong Kong
Other persons with the same name
- Zhe Lin — disambiguation page
- Zhe L. Lin
![[0000-0003-1154-9907]](https://dblp.uni-trier.de./img/orcid-mark.12x12.png "0000-0003-1154-9907")
(aka: Zhe Lin 0001) — Adobe Systems, Inc., San Jose, CA, USA - Zhe Lin 0002 — Sun Yat-sen University, Institute of Logic and Cognition, Guangzhou, China (and 1 more)
- Zhe Lin 0003 — Chaoyang University of Technology, Taichung, Taiwan
- Zhe Lin 0004 — Beijing Genomics Institute, Shenzhen
- Zhe Lin 0005 — Fudan University, Shanghai, China
- Zhe Lin 0006 — Shanghai Maritime University, Shanghai, China
Refine list
refinements active!
zoomed in on ?? of ?? records
view refined list in
export refined list as
2020 – today
- 2024
[c5]Chunyou Su, Linfeng Du, Tingyuan Liang, Zhe Lin, Maolin Wang, Sharad Sinha, Wei Zhang:
GraFlex: Flexible Graph Processing on FPGAs through Customized Scalable Interconnection Network. FPGA 2024: 143-153- 2023
- [j4]Zhe Lin, Tingyuan Liang, Jieru Zhao, Sharad Sinha, Wei Zhang:
HL-Pow: Learning-Assisted Pre-RTL Power Modeling and Optimization for FPGA HLS. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 42(11): 3925-3938 (2023) - 2022
- [c4]Zhe Lin, Zike Yuan, Jieru Zhao, Wei Zhang, Hui Wang, Yonghong Tian:
PowerGear: Early-Stage Power Estimation in FPGA HLS via Heterogeneous Edge-Centric GNNs. DATE 2022: 1341-1346 - [i8]Zhe Lin, Zike Yuan, Jieru Zhao, Wei Zhang, Hui Wang, Yonghong Tian:
PowerGear: Early-Stage Power Estimation in FPGA HLS via Heterogeneous Edge-Centric GNNs. CoRR abs/2201.10114 (2022) - 2021
- [j3]Zhe Lin, Sharad Sinha, Wei Zhang:
Hard-ODT: Hardware-Friendly Online Decision Tree Learning Algorithm and System. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 40(11): 2279-2292 (2021) - [i7]Wei Zeng, Xiaozhe Ren, Teng Su, Hui Wang, Yi Liao, Zhiwei Wang, Xin Jiang, ZhenZhang Yang, Kaisheng Wang, Xiaoda Zhang, Chen Li, Ziyan Gong, Yifan Yao, Xinjing Huang, Jun Wang, Jianfeng Yu, Qi Guo, Yue Yu, Yan Zhang, Jin Wang, Hengtao Tao, Dasen Yan, Zexuan Yi, Fang Peng, Fangqing Jiang, Han Zhang, Lingfeng Deng, Yehong Zhang, Zhe Lin, Chao Zhang, Shaojie Zhang, Mingyue Guo, Shanzhi Gu, Gaojun Fan, Yaowei Wang, Xuefeng Jin, Qun Liu, Yonghong Tian:
PanGu-α: Large-scale Autoregressive Pretrained Chinese Language Models with Auto-parallel Computation. CoRR abs/2104.12369 (2021) - 2020
- [c3]Zhe Lin, Jieru Zhao, Sharad Sinha, Wei Zhang:
HL-Pow: A Learning-Based Power Modeling Framework for High-Level Synthesis. ASP-DAC 2020: 574-580 - [i6]Zhe Lin, Jieru Zhao, Sharad Sinha, Wei Zhang:
HL-Pow: A Learning-Based Power Modeling Framework for High-Level Synthesis. CoRR abs/2009.00871 (2020) - [i5]Zhe Lin, Sharad Sinha, Wei Zhang:
Towards Efficient and Scalable Acceleration of Online Decision Tree Learning on FPGA. CoRR abs/2009.01431 (2020) - [i4]Zhe Lin, Sharad Sinha, Wei Zhang:
An Ensemble Learning Approach for In-situ Monitoring of FPGA Dynamic Power. CoRR abs/2009.01432 (2020) - [i3]Zhe Lin, Wei Zhang, Sharad Sinha:
Decision Tree Based Hardware Power Monitoring for Run Time Dynamic Power Management in FPGA. CoRR abs/2009.01434 (2020) - [i2]Zhe Lin, Sharad Sinha, Hao Liang, Liang Feng, Wei Zhang:
Scalable Light-Weight Integration of FPGA Based Accelerators with Chip Multi-Processors. CoRR abs/2009.01441 (2020) - [i1]Zhe Lin, Sharad Sinha, Wei Zhang:
Hard-ODT: Hardware-Friendly Online Decision Tree Learning Algorithm and System. CoRR abs/2012.06272 (2020)
2010 – 2019
- 2019
- [j2]Zhe Lin, Sharad Sinha, Wei Zhang:
An Ensemble Learning Approach for In-Situ Monitoring of FPGA Dynamic Power. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 38(9): 1661-1674 (2019) - [c2]Zhe Lin, Sharad Sinha, Wei Zhang:
Towards Efficient and Scalable Acceleration of Online Decision Tree Learning on FPGA. FCCM 2019: 172-180 - 2018
- [j1]Zhe Lin, Sharad Sinha, Hao Liang, Liang Feng, Wei Zhang:
Scalable Light-Weight Integration of FPGA Based Accelerators with Chip Multi-Processors. IEEE Trans. Multi Scale Comput. Syst. 4(2): 152-162 (2018) - 2017
- [c1]Zhe Lin, Wei Zhang, Sharad Sinha:
Decision tree based hardware power monitoring for run time dynamic power management in FPGA. FPL 2017: 1-8
Coauthor Index
manage site settings
To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.
Unpaywalled article links
Add open access links from 
to the list of external document links (if available).
Privacy notice: By enabling the option above, your browser will contact the API of unpaywall.org to load hyperlinks to open access articles. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the Unpaywall privacy policy.
Archived links via Wayback Machine
For web page which are no longer available, try to retrieve content from the 
of the Internet Archive (if available).
Privacy notice: By enabling the option above, your browser will contact the API of archive.org to check for archived content of web pages that are no longer available. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the Internet Archive privacy policy.
Reference lists
Add a list of references from 
, 
, and 
to record detail pages.
load references from crossref.org and opencitations.net
Privacy notice: By enabling the option above, your browser will contact the APIs of crossref.org, opencitations.net, and semanticscholar.org to load article reference information. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the Crossref privacy policy and the OpenCitations privacy policy, as well as the AI2 Privacy Policy covering Semantic Scholar.
Citation data
Add a list of citing articles from and to record detail pages.
load citations from opencitations.net
Privacy notice: By enabling the option above, your browser will contact the API of opencitations.net and semanticscholar.org to load citation information. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the OpenCitations privacy policy as well as the AI2 Privacy Policy covering Semantic Scholar.
OpenAlex data
Load additional information about publications from 
.
Privacy notice: By enabling the option above, your browser will contact the API of openalex.org to load additional information. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the information given by OpenAlex.
last updated on 2024-11-15 20:38 CET by the dblp team
all metadata released as open data under CC0 1.0 license
see also: Terms of Use | Privacy Policy | Imprint
dblp was originally created in 1993 at:
since 2018, dblp has been operated and maintained by:
the dblp computer science bibliography is funded and supported by:
