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ORCIDDebjyoti Bhattacharjee
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2020 – today
- 2024
[c34]Paul Delestrac, Jonathan Miquel, Debjyoti Bhattacharjee, Diksha Moolchandani, Francky Catthoor, Lionel Torres, David Novo:
Analyzing GPU Energy Consumption in Data Movement and Storage. ASAP 2024: 143-151- [c33]Paul Delestrac, Debjyoti Bhattacharjee, Simei Yang, Diksha Moolchandani, Francky Catthoor, Lionel Torres, David Novo:
Multi-Level Analysis of GPU Utilization in ML Training Workloads. DATE 2024: 1-6 - [c32]Nitish Satya Murthy, Nathan Laubeuf, Debjyoti Bhattacharjee, Francky Catthoor, Marian Verhelst:
Adaptive Block-Scaled GeMMs on Vector Processors for DNN Training at the Edge. VLSI-SoC 2024: 1-6 - [i8]Debjyoti Bhattacharjee, Anmol, Tommaso Marinelli
, Karan Pathak, Peter Kourzanov:
Full-stack evaluation of Machine Learning inference workloads for RISC-V systems. CoRR abs/2405.15380 (2024) - [i7]Giuseppe Maria Sarda, Nimish Shah, Debjyoti Bhattacharjee, Peter Debacker, Marian Verhelst:
Optimising GPGPU Execution Through Runtime Micro-Architecture Parameter Analysis. CoRR abs/2407.11999 (2024) - [i6]Yukai Chen, Simei Yang, Debjyoti Bhattacharjee, Francky Catthoor, Arindam Mallik:
SAfEPaTh: A System-Level Approach for Efficient Power and Thermal Estimation of Convolutional Neural Network Accelerator. CoRR abs/2407.17623 (2024) - 2023
- [j10]Iman Dadras, Giuseppe Maria Sarda, Nathan Laubeuf, Debjyoti Bhattacharjee, Arindam Mallik:
AIMC Modeling and Parameter Tuning for Layer-Wise Optimal Operating Point in DNN Inference. IEEE Access 11: 87189-87199 (2023) - [j9]Pouya Houshmand, Giuseppe Maria Sarda, Vikram Jain, Kodai Ueyoshi, Ioannis A. Papistas, Man Shi, Qilin Zheng, Debjyoti Bhattacharjee, Arindam Mallik, Peter Debacker, Diederik Verkest, Marian Verhelst:
DIANA: An End-to-End Hybrid DIgital and ANAlog Neural Network SoC for the Edge. IEEE J. Solid State Circuits 58(1): 203-215 (2023) - [j8]Anupam Chattopadhyay, Debjyoti Bhattacharjee, Subhamoy Maitra:
Improved Linear Decomposition of Majority and Threshold Boolean Functions. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 42(11): 3951-3957 (2023) - [c31]Giuseppe Maria Sarda, Nimish Shah, Debjyoti Bhattacharjee, Peter Debacker, Marian Verhelst:
Optimising GPGPU Execution Through Runtime Micro-Architecture Parameter Analysis. IISWC 2023: 226-228 - 2022
- [j7]Simei Yang, Debjyoti Bhattacharjee, Vinay B. Y. Kumar, Saikat Chatterjee, Sayandip De, Peter Debacker, Diederik Verkest, Arindam Mallik, Francky Catthoor:
AERO: Design Space Exploration Framework for Resource-Constrained CNN Mapping on Tile-Based Accelerators. IEEE J. Emerg. Sel. Topics Circuits Syst. 12(2): 508-521 (2022) - [j6]Nathan Laubeuf, Jonas Doevenspeck, Ioannis A. Papistas, Michele Caselli, Stefan Cosemans, Peter Vrancx, Debjyoti Bhattacharjee, Arindam Mallik, Peter Debacker, Diederik Verkest, Francky Catthoor, Rudy Lauwereins:
Dynamic Quantization Range Control for Analog-in-Memory Neural Networks Acceleration. ACM Trans. Design Autom. Electr. Syst. 27(5): 46:1-46:21 (2022) - [c30]Michele Caselli, Debjyoti Bhattacharjee, Arindam Mallik, Peter Debacker, Diederik Verkest:
Tiny ci-SAR A/D Converter for Deep Neural Networks in Analog in-Memory Computation. ISCAS 2022: 1823-1827 - [c29]Kodai Ueyoshi, Ioannis A. Papistas, Pouya Houshmand, Giuseppe Maria Sarda, Vikram Jain, Man Shi, Qilin Zheng, Juan Sebastian Piedrahita Giraldo, Peter Vrancx, Jonas Doevenspeck, Debjyoti Bhattacharjee, Stefan Cosemans, Arindam Mallik, Peter Debacker, Diederik Verkest, Marian Verhelst:
DIANA: An End-to-End Energy-Efficient Digital and ANAlog Hybrid Neural Network SoC. ISSCC 2022: 1-3 - 2021
- [c28]Shubham Rai, Mengyun Liu, Anteneh Gebregiorgis, Debjyoti Bhattacharjee, Krishnendu Chakrabarty, Said Hamdioui, Anupam Chattopadhyay, Jens Trommer, Akash Kumar:
Perspectives on Emerging Computation-in-Memory Paradigms. DATE 2021: 1925-1934 - [c27]Debjyoti Bhattacharjee, Nathan Laubeuf, Stefan Cosemans, Ioannis A. Papistas, Arindam Mallik, Peter Debacker, Myung Hee Na, Diederik Verkest:
Design-Technology Space Exploration for Energy Efficient AiMC-Based Inference Acceleration. ISCAS 2021: 1-5 - [c26]Debjyoti Bhattacharjee, Anirban Majumder, Anupam Chattopadhyay:
In-memory realization of SHA-2 using ReVAMP architecture. VLSID 2021: 47-53 - 2020
- [j5]Debjyoti Bhattacharjee, Yaswanth Tavva, Arvind Easwaran, Anupam Chattopadhyay:
Crossbar-Constrained Technology Mapping for ReRAM Based In-Memory Computing. IEEE Trans. Computers 69(5): 734-748 (2020) - [j4]Rotem Ben Hur, Ronny Ronen, Ameer Haj Ali, Debjyoti Bhattacharjee, Adi Eliahu, Natan Peled, Shahar Kvatinsky:
SIMPLER MAGIC: Synthesis and Mapping of In-Memory Logic Executed in a Single Row to Improve Throughput. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 39(10): 2434-2447 (2020) - [c25]Debjyoti Bhattacharjee, Anupam Chattopadhyay, Srijit Dutta, Ronny Ronen, Shahar Kvatinsky:
CONTRA: Area-Constrained Technology Mapping Framework For Memristive Memory Processing Unit. ICCAD 2020: 150:1-150:9 - [c24]Srijit Dutta, Yaswanth Tavva, Debjyoti Bhattacharjee, Anupam Chattopadhyay:
Efficient Quantum Circuits for Square-Root and Inverse Square-Root. VLSID 2020: 55-60 - [i5]Debjyoti Bhattacharjee, Anupam Chattopadhyay, Srijit Dutta, Ronny Ronen, Shahar Kvatinsky:
CONTRA: Area-Constrained Technology Mapping Framework For Memristive Memory Processing Unit. CoRR abs/2009.00881 (2020)
2010 – 2019
- 2019
- [c23]Valerio Tenace, Roberto Giorgio Rizzo, Debjyoti Bhattacharjee, Anupam Chattopadhyay, Andrea Calimera:
SAID: A Supergate-Aided Logic Synthesis Flow for Memristive Crossbars. DATE 2019: 372-377 - [c22]Debjyoti Bhattacharjee, Abdullah Ash-Saki, Mahabubul Alam, Anupam Chattopadhyay, Swaroop Ghosh:
MUQUT: Multi-Constraint Quantum Circuit Mapping on NISQ Computers: Invited Paper. ICCAD 2019: 1-7 - [c21]Debjyoti Bhattacharjee, Mathias Soeken, Srijit Dutta, Anupam Chattopadhyay, Giovanni De Micheli:
Reversible Pebble Games for Reducing Qubits in Hierarchical Quantum Circuit Synthesis. ISMVL 2019: 102-107 - [c20]Debjyoti Bhattacharjee, Anupam Chattopadhyay, Ricardo Jack Liwongan:
Accelerating Binary-Matrix Multiplication on FPGA. SoCC 2019: 254-259 - [i4]Laxmidhar Biswal, Debjyoti Bhattacharjee, Anupam Chattopadhyay, Hafizur Rahaman:
New techniques for fault-tolerant decomposition of Multi-Controlled Toffoli gate. CoRR abs/1904.06920 (2019) - 2018
- [b1]Debjyoti Bhattacharjee:
Architectures and automation for beyond-CMOS technologies. Nanyang Technological University, Singapore, 2018 - [j3]Debjyoti Bhattacharjee, Anne Siemon, Eike Linn, Stephan Menzel, Anupam Chattopadhyay:
Kogge-Stone Adder Realization using 1S1R Resistive Switching Crossbar Arrays. ACM J. Emerg. Technol. Comput. Syst. 14(2): 30:1-30:14 (2018) - [c19]Debjyoti Bhattacharjee, Arko Dutt, Anupam Chattopadhyay:
MAMI: Majority and Multi-Input Logic on Memristive Crossbar Array. APCCAS 2018: 435-438 - [c18]Debjyoti Bhattacharjee, Luca G. Amarù, Anupam Chattopadhyay:
Technology-aware logic synthesis for ReRAM based in-memory computing. DATE 2018: 1435-1440 - [c17]Anmol Prakash Surhonne, Debjyoti Bhattacharjee, Anupam Chattopadhyay:
Synthesis of Multi-valued Literal Using Lukasiewicz Logic. ISMVL 2018: 204-209 - [c16]Debjyoti Bhattacharjee, Anupam Chattopadhyay:
Synthesis, Technology Mapping and Optimization for Emerging Technologies. ISVLSI 2018: 369-374 - [c15]Swagata Mandal, Debjyoti Bhattacharjee, Yaswanth Tavva, Anupam Chattopadhyay:
ReRAM-based In-Memory Computation of Galois Field arithmetic. VLSI-SoC 2018: 1-6 - [c14]Swagata Mandal, Yaswanth Tavva, Debjyoti Bhattacharjee, Anupam Chattopadhyay:
ReRAM Based In-Memory Computation of Single Bit Error Correcting BCH Code. VLSI-SoC (Selected Papers) 2018: 128-146 - [c13]Tarun Vatwani, Arko Dutt, Debjyoti Bhattacharjee, Anupam Chattopadhyay:
Floating Point Multiplication Mapping on ReRAM Based In-memory Computing Architecture. VLSID 2018: 439-444 - [i3]Srijit Dutta, Debjyoti Bhattacharjee, Anupam Chattopadhyay:
Quantum Circuits for Toom-Cook Multiplication. CoRR abs/1805.02342 (2018) - [i2]Debjyoti Bhattacharjee, Yaswanth Tavva, Arvind Easwaran, Anupam Chattopadhyay:
Crossbar-Constrained Technology Mapping for ReRAM based In-Memory Computing. CoRR abs/1809.08195 (2018) - 2017
- [j2]Debjyoti Bhattacharjee, Anne Siemon, Eike Linn, Anupam Chattopadhyay:
Efficient complementary resistive switch-based crossbar array Booth multiplier. Microelectron. J. 64: 78-85 (2017) - [c12]Debjyoti Bhattacharjee, Arvind Easwaran, Anupam Chattopadhyay:
Area-constrained technology mapping for in-memory computing using ReRAM devices. ASP-DAC 2017: 69-74 - [c11]Debjyoti Bhattacharjee, Rajeswari Devadoss, Anupam Chattopadhyay:
ReVAMP: ReRAM based VLIW architecture for in-memory computing. DATE 2017: 782-787 - [c10]Debjyoti Bhattacharjee, Vikramkumar Pudi, Anupam Chattopadhyay:
SHA-3 implementation using ReRAM based in-memory computing architecture. ISQED 2017: 325-330 - [c9]Debjyoti Bhattacharjee, Anupam Chattopadhyay:
Efficient Binary Basic Linear Algebra Operations on ReRAM Crossbar Arrays. VLSID 2017: 277-282 - [i1]Debjyoti Bhattacharjee, Anupam Chattopadhyay:
Depth-Optimal Quantum Circuit Placement for Arbitrary Topologies. CoRR abs/1703.08540 (2017) - 2016
- [c8]Debjyoti Bhattacharjee, Soumi Chattopadhyay, Ansuman Banerjee:
EAST: Efficient Assertion Simulation techniques. DATE 2016: 1363-1368 - [c7]Debjyoti Bhattacharjee, Paheli Bhattacharya:
Ensemble Classifier based approach for Code-Mixed Cross-Script Question Classification. FIRE (Working Notes) 2016: 119-121 - [c6]Debjyoti Bhattacharjee, Anupam Chattopadhyay:
Delay-optimal technology mapping for in-memory computing using ReRAM devices. ICCAD 2016: 119 - [c5]Debjyoti Bhattacharjee, Anne Siemon, Eike Linn, Stephan Menzel, Anupam Chattopadhyay:
Efficient implementation of multiplexer and priority multiplexer using 1S1R ReRAM crossbar arrays. MWSCAS 2016: 1-4 - [c4]Debjyoti Bhattacharjee, Anupam Chattopadhyay:
Hardware Accelerator for Stream Cipher Spritz. SECRYPT 2016: 215-222 - [c3]Debjyoti Bhattacharjee, Farhad Merchant, Anupam Chattopadhyay:
Enabling in-memory computation of binary BLAS using ReRAM crossbar arrays. VLSI-SoC 2016: 1-6 - 2015
- [j1]Debjyoti Bhattacharjee, Ashish Bakshi, Kuntal Ghosh:
Comparison Between an HVS Inspired Linear Filter and the Bilateral Filter in Performing "Vision at a Glance" through Smoothing with Edge Preservation. Int. J. Image Graph. 15(4): 1550015:1-1550015:15 (2015) - [c2]Debjyoti Bhattacharjee, Ansuman Banerjee, Anupam Chattopadhyay:
EvoDeb: Debugging Evolving Hardware Designs. VLSID 2015: 481-486 - 2014
- [c1]Debjyoti Bhattacharjee, Anupam Chattopadhyay:
Efficient Hardware Accelerator for AEGIS-128 Authenticated Encryption. Inscrypt 2014: 385-402
Coauthor Index
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last updated on 2024-12-11 21:39 CET by the dblp team
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