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ORCIDMamoru Sasaki
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2020 – today
- 2024
[c9]Jun Imaoka, Mamoru Sasaki, Yasumichi Omoto, Mostafa Noah, Koichi Shigematsu, Masayoshi Yamamoto:
Common Mode Noise Reduction Methods Used for High Power Density DC/DC Converters. EMC Compo 2024: 1-6- 2020
- [c8]Mamoru Sasaki
, Jun Imaoka, Masayoshi Yamamoto, Akira Nakano, Koji Fuse:
Analysis of Common Mode Noise Reduction Mechanism in A Shielded Inductor. ISIE 2020: 660-665
2000 – 2009
- 2009
- [j9]Mamoru Sasaki:
A High-Frequency Clock Distribution Network Using Inductively Loaded Standing-Wave Oscillators. IEEE J. Solid State Circuits 44(10): 2800-2807 (2009) - 2008
- [c7]Mamoru Sasaki:
A 9.5GHz 6ps-Skew Space-Filling-Curve Clock Distribution with 1.8V Full-Swing Standing-Wave Oscillators. ISSCC 2008: 518-519 - 2007
- [j8]Atsushi Iwata, Takeshi Yoshida, Mamoru Sasaki:
Low-Voltage and Low-Noise CMOS Analog Circuits Using Scaled Devices. IEICE Trans. Electron. 90-C(6): 1149-1155 (2007) - [c6]Mamoru Sasaki, Mitsuru Shiozaki, Atsushi Mori, Atsushi Iwata, Hiroaki Ikeda:
12GHz Low-Area-Overhead Standing-Wave Clock Distribution with Inductively-Loaded and Coupled Technique. ISSCC 2007: 180-595 - 2006
- [j7]Mitsuru Shiozaki, Mamoru Sasaki, Atsushi Mori, Atsushi Iwata, Hiroaki Ikeda:
20GHz uniform-phase uniform-amplitude standing-wave clock distribution. IEICE Electron. Express 3(2): 11-16 (2006) - [j6]Takeshi Yoshida, Yoshihiro Masui, Takayuki Mashimo, Mamoru Sasaki, Atsushi Iwata:
A 1 V Low-Noise CMOS Amplifier Using Autozeroing and Chopper Stabilization Technique. IEICE Trans. Electron. 89-C(6): 769-774 (2006) - [j5]Mamoru Sasaki:
Design of a Millimeter-Wave CMOS Radiation Oscillator With an Above-Chip Patch Antenna. IEEE Trans. Circuits Syst. II Express Briefs 53-II(10): 1128-1132 (2006) - 2005
- [j4]Mitsuru Shiozaki, Toru Mukai, Masahiro Ono, Mamoru Sasaki, Atsushi Iwata:
A 2.7 Gcps and 7-Multiplexing CDMA Serial Communication Chip Using Two-Step Synchronization Technique. IEICE Trans. Electron. 88-C(6): 1233-1240 (2005) - [j3]Mitsuru Shiozaki, Toru Mukai, Masahiro Ono, Mamoru Sasaki, Atsushi Iwata:
A 2.7 Gcps and 7-Multiplexing CDMA Serial Communication Chip for Real-Time Robot Control with Multiprocessors. J. Robotics Mechatronics 17(4): 463-468 (2005) - [c5]Takeshi Yoshida, Miho Akagi, Mamoru Sasaki, Atsushi Iwata:
A 1V supply successive approximation ADC with rail-to-rail input voltage range. ISCAS (1) 2005: 192-195 - 2002
- [j2]Hongbing Zhu, Ningping Sun, Mamoru Sasaki, Kei Eguchi, Toru Tabata, Fuji Ren:
A Boltzmann Machine with Non-rejective Move. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 85-A(6): 1229-1235 (2002)
1990 – 1999
- 1998
- [c4]Hongbing Zhu, Mamoru Sasaki, Takahiro Inoue, K. Sugitani:
A Proof of Convergence of Asynchronous Boltzmann Machine. ICONIP 1998: 522-525 - 1994
- [c3]Hongbing Zhu, Mamoru Sasaki, Fumio Ueno, Takahiro Inoue:
An Appraoch of Sequential-Like Parallel Algorithm in Boltzmann Machine. ISCAS 1994: 439-442 - 1992
- [c2]Kazutaka Taniguchi, Mamoru Sasaki, Yutaka Ogata, Fumio Ueno, Takahiro Inoue:
Bi-CMOS Current Mode Multiple Valued Logic Circuits with 1.5V Supply Voltage. ISMVL 1992: 216-220 - 1991
- [c1]Mamoru Sasaki, Fumio Ueno:
A Fuzzy Logic Function Generator (FLUG) Implemented with Current Mode CMOS Circuits. ISMVL 1991: 356-362 - 1990
- [j1]Mamoru Sasaki, Takahiro Inoue, Yuji Shirai, Fumio Ueno:
Fuzzy Multiple-Input Maximum and Minimum Circuits in Current Mode and Their Analyses Using Bounded-Difference Equations. IEEE Trans. Computers 39(6): 768-774 (1990)
Coauthor Index
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