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2020 – today
- 2024
[c83]Adam Hudec, Róbert Ondica, Richard Ravasz, Viera Stopjaková:
Constant Voltage Maximum Power Point Tracking Method for Fully Integrated Solar-Powered Energy Harvester. DDECS 2024: 152-155- 2023
- [j22]Fabian Khateb
, Montree Kumngern, Tomasz Kulej, Viera Stopjaková, Costas Psychalinos:
0.3-V, 357.4-nW Voltage-Mode First-Order Analog Filter Using a Multiple-Input VDDDA. IEEE Access 11: 96636-96647 (2023) - [c82]Lukás Nagy, Michal Sovcik, Viera Stopjaková:
Design of Ultra-Low Power Comparator in 65 NM CMOS Technology with Rail-to-Rail Input Range. AFRICON 2023: 1-4 - [c81]Martin Kovác, Miroslav Potocný, Daniel Arbet, Róbert Ondica, Richard Ravasz, Viera Stopjaková:
Low-Power CMOS Frequency Comparator. MIPRO 2023: 196-201 - [c80]Richard Ravasz, David Maljar, Daniel Arbet, Viera Stopjaková, Peter Kubinec:
Design of the Slope Detection Circuit for On-Chip Current Sensing. MIXDES 2023: 111-115 - 2022
- [j21]Fabian Khateb, Montree Kumngern, Tomasz Kulej, Meysam Akbari, Viera Stopjaková:
0.5 V, nW-Range Universal Filter Based on Multiple-Input Transconductor for Biosignals Processing. Sensors 22(22): 8619 (2022) - [j20]Tomasz Kulej, Fabian Khateb, Daniel Arbet, Viera Stopjaková:
A 0.3-V High Linear Rail-to-Rail Bulk-Driven OTA in 0.13 μm CMOS. IEEE Trans. Circuits Syst. II Express Briefs 69(4): 2046-2050 (2022) - [c79]David Maljar, Daniel Arbet, Martin Kovác, Róbert Ondica, Viera Stopjaková:
Autocalibration Approach for Improving Robustness of Analog ICs. DDECS 2022: 54-59 - [c78]Richard Ravasz, Adam Hudec, Daniel Arbet, Viera Stopjaková:
On-Chip Current Sensing Approaches for DC-DC Converters. DDECS 2022: 64-67 - [c77]Miroslav Hagara, Oldrich Ondrácek, Viera Stopjaková, Radovan Stojanovic:
Histogram memory reduction in FPGA gradient edge detectors. MECO 2022: 1-4 - [c76]Daniel Arbet, Martin Kovác, David Maljas, Lukás Nagy, Viera Stopjaková:
High Power Supply Rejection LDO Regulator for Switching Applications. MIPRO 2022: 162-167 - [c75]Lukás Nagy, Daniel Arbet, Martin Kovác, Miroslav Potocný, Michal Sovcik, Viera Stopjaková:
Low-Power Rail-to-Rail Comparator in 130 nm CMOS Technology. RADIOELEKTRONIKA 2022: 1-4 - 2021
- [j19]Erik Vavrinsky, Viera Stopjaková, Martin Kopani, Helena Kosnácová:
The Concept of Advanced Multi-Sensor Monitoring of Human Stress. Sensors 21(10): 3499 (2021) - [j18]Miroslav Potocný, Martin Kovác, Daniel Arbet, Michal Sovcik, Lukás Nagy, Viera Stopjaková, Richard Ravasz:
Low-Voltage DC-DC Converter for IoT and On-Chip Energy Harvester Applications. Sensors 21(17): 5721 (2021) - [c74]Lukás Nagy, Daniel Arbet, Martin Kovác, Miroslav Potocný, Róbert Ondica, Viera Stopjaková:
EKV Model for Bulk-Driven Circuit Design Using gmb/ID Method. AFRICON 2021: 1-4 - [c73]Lukás Nagy, Daniel Arbet, Martin Kovác, Miroslav Potocný, Michal Sovcik, Viera Stopjaková:
EKV MOS Transistor Model For Ultra Low-Voltage Bulk-Driven IC Design. DDECS 2021: 6-10 - [c72]David Maljar, Michal Sovcík, Daniel Arbet, Viera Stopjaková:
Enhanced Reliability of Fully Differential Difference Amplifier Through On-chip Digital Calibration. DDECS 2021: 119-122 - [c71]Daniel Arbet, Miroslav Potocný, Martin Kovác, Lukás Nagy, Viera Stopjaková:
Fully On-Chip Low-Drop Regulator for Low-Power Applications. MIPRO 2021: 101-106 - [c70]Róbert Ondica, Daniel Arbet, Martin Kovác, Viera Stopjaková:
Investigation of Inductor-based Fully On-chip Boost Converter. MIXDES 2021: 115-119 - [i2]Lukás Kohútka, Lukás Nagy, Viera Stopjaková:
RED-based Scheduler on Chip for Mixed-Criticality Real-Time Systems. CoRR abs/2110.01365 (2021) - [i1]Adam Hudec, Lukás Nagy, Martin Kovác, Viera Stopjaková:
Maximum Power Point Tracking Circuit for an Energy Harvester in 130 nm CMOS Technology. CoRR abs/2110.11504 (2021) - 2020
- [j17]Lukás Kohútka, Viera Stopjaková:
Novel efficient on-chip task scheduler for multi-core hard real-time systems. Microprocess. Microsystems 76: 103083 (2020) - [c69]Lukás Nagy, Daniel Arbet, Martin Kovác, Miroslav Potocný, Michal Sovcik, Viera Stopjaková:
Dynamic Properties Of Ultra Low-Voltage Rail-to-Rail Comparator Designed In 130 nm CMOS Technology. DDECS 2020: 1-4 - [c68]Lukás Kohútka, Lukás Nagy, Viera Stopjaková:
RED-based Scheduler on Chip for Mixed-Criticality Real-Time Systems. MECO 2020: 1-4 - [c67]Martin Kovác, Daniel Arbet, Lukás Nagy, Michal Sovcik, Viera Stopjaková:
Multi-Topology DC-DC Converter for Low-Voltage Energy Harvesting Systems. MIPRO 2020: 77-82 - [c66]Lukás Kohútka, Viera Stopjaková:
ASIC Architecture and Implementation of RED Scheduler for Mixed-Criticality Real-Time Systems. MIXDES 2020: 83-88 - [c65]Lukás Nagy, Ales Chvála, Viera Stopjaková:
Low-Leakage ESD Structures in 130nm CMOS Technology. RADIOELEKTRONIKA 2020: 1-4 - [c64]Miroslav Potocný, Michal Sovcík, Viera Stopjaková:
Development of test equipment for evaluation of low-power AC/DC converter ASIC. RADIOELEKTRONIKA 2020: 1-5 - [c63]Michal Sovcík, Viera Stopjaková, Daniel Arbet, Miroslav Potocný:
Autonomous On-Chip Digital Calibration for Analog ICs in Nanotechnologies. RADIOELEKTRONIKA 2020: 1-5 - [e2]Lukás Nagy, Viera Stopjaková:
30th International Conference Radioelektronika, RADIOELEKTRONIKA 2020, Bratislava, Slovakia, April 15-16, 2020. IEEE 2020, ISBN 978-1-7281-6469-4 [contents]
2010 – 2019
- 2019
- [j16]Lukás Kohútka, Lukás Nagy, Viera Stopjaková:
A Novel On-Chip Task Scheduler for Mixed-Criticality Real-Time Systems. J. Circuits Syst. Comput. 28(Supplement-1): 1940005:1-1940005:22 (2019) - [c62]Lukás Nagy, Daniel Arbet, Martin Kovác, Miroslav Potocný, Michal Sovcik, Viera Stopjaková:
Performance Analysis Of Ultra Low-Voltage Rail-to-Rail Comparator In 130 nm CMOS Technology. AFRICON 2019: 1-5 - [c61]Lukás Kohútka, Lukás Nagy, Viera Stopjaková:
Low Latency Hardware-Accelerated Dynamic Memory Manager for Hard Real-Time and Mixed-Criticality Systems. DDECS 2019: 1-6 - [c60]Martin Kovác, Daniel Arbet, Viera Stopjaková, Michal Sovcik, Lukás Nagy:
Investigation of Low-Voltage, Sub-threshold Charge Pump with Parasitics Aware Design Methodology. DDECS 2019: 1-4 - [c59]Lukás Nagy, Daniel Arbet, Martin Kovác, Miroslav Potocný, Viera Stopjaková:
Ultra Low-Voltage Rail-to-Rail Comparator Design in 130 nm CMOS Technology. DDECS 2019: 1-6 - [c58]Miroslav Potocný, Juraj Brenkus, Viera Stopjaková:
High side power MOSFET switch driver for a low-power AC/DC converter. DDECS 2019: 1-6 - [c57]Zoran Stamenkovic, Alberto Bosio, György Cserey, Ondrej Novák, Witold A. Pleskacz, Lukás Sekanina, Andreas Steininger, Goran Stojanovic, Viera Stopjaková:
International Symposium on Design and Diagnostics of Electronic Circuits and Systems. ITC 2019: 1-4 - [c56]Lukás Kohútka, Viera Stopjaková:
A New Hardware-Accelerated Scheduler for Soft Real-Time Tasks. MECO 2019: 1-4 - [c55]Daniel Arbet, Martin Kovác, Viera Stopjaková, Miroslav Potocný:
Voltage-to-Frequency Converter for Ultra-Low-Voltage Applications. MIPRO 2019: 53-58 - [c54]Viera Stopjaková, Martin Kovác, Daniel Arbet, Lukás Nagy:
Towards Energy-autonomous Integrated Systems Through Ultra-low Voltage Analog IC Design. MIXDES 2019: 38-45 - 2018
- [j15]Michal Sovcik, Martin Kovác, Daniel Arbet, Viera Stopjaková, Miroslav Potocný:
Ultra-low-voltage boosted driver for self-powered systems. Microelectron. Reliab. 80: 155-163 (2018) - [j14]Lukás Kohútka, Viera Stopjaková:
Reliable real-time task scheduler based on Rocket Queue architecture. Microelectron. Reliab. 84: 7-19 (2018) - [c53]Lukás Kohútka, Viera Stopjaková:
Heap Queue: A Novel Efficient Hardware Architecture of MIN/MAX Queues for Real-Time Systems. DDECS 2018: 5-8 - [c52]Daniel Arbet, Martin Kovác, Lukás Nagy, Viera Stopjaková, Michal Sovcik:
Two-Stage Bulk-Driven Variable Gain Amplifier for Low-Voltage Applications. DDECS 2018: 45-50 - [c51]Lukás Nagy, Daniel Arbet, Martin Kovác, Miroslav Potocný, Viera Stopjaková:
Design and Performance Analysis of Ultra-Low Voltage Rail-to-Rail Comparator in 130 nm CMOS Technology. DDECS 2018: 51-54 - [c50]Miroslav Potocný, Viera Stopjaková, Martin Kovác:
Self Vth-Compensating CMOS On-Chip Rectifier for Inductively Powered Implantable Medical Devices. DDECS 2018: 158-161 - [c49]Lukás Kohútka, Lukás Nagy, Viera Stopjaková:
A Novel Hardware-Accelerated Priority Queue for Real-Time Systems. DSD 2018: 46-53 - [c48]Lukás Kohútka, Viera Stopjaková:
A novel hardware-accelerated real-time task scheduler based on robust earliest deadline algorithm. DTIS 2018: 1-2 - [c47]Daniel Arbet, Martin Kovác, Viera Stopjaková, Miroslav Potocný:
Bulk-driven fully differential difference amplifier for ultra-low voltage applications. MIPRO 2018: 93-98 - 2017
- [j13]Andreas Steininger, Adam Pawlak, Viera Stopjaková:
Foreword. J. Circuits Syst. Comput. 26(8): 1702001:1-1702001:1 (2017) - [j12]Daniel Arbet, Viera Stopjaková, Martin Kovác, Lukás Nagy, Matej Rakus, Michal Sovcik:
130 nm CMOS Bulk-Driven Variable Gain Amplifier for Low-Voltage Applications. J. Circuits Syst. Comput. 26(8): 1740003:1-1740003:19 (2017) - [j11]Juraj Brenkus, Viera Stopjaková, Viera Cernanová, Daniel Arbet, Lukás Nagy, Vladimír Sedlák:
A Novel Method Towards Time-Efficient Fault Analysis of Analog and Mixed-Signal Circuits. J. Circuits Syst. Comput. 26(8): 1740005:1-1740005:20 (2017) - [c46]Lukás Nagy, Daniel Arbet, Martin Kovác, Viera Stopjaková:
Low-power bulk-driven rail-to-rail comparator in 130 nm CMOS technology. AFRICON 2017: 649-652 - [c45]Michal Sovcik, Martin Kovác, Daniel Arbet, Viera Stopjaková:
Ultra-low-voltage driver for large load capacitance in 130nm CMOS technology. DDECS 2017: 127-132 - [c44]Lukás Kohútka, Viera Stopjaková:
Rocket Queue: New data sorting architecture for real-time systems. DDECS 2017: 207-212 - [c43]Lukás Kohútka, Viera Stopjaková:
A new efficient sorting architecture for real-time systems. MECO 2017: 1-4 - 2016
- [j10]Daniel Arbet, Gabriel Nagy, Martin Kovác, Viera Stopjaková:
Fully Differential Difference Amplifier for Low-Noise and Low-Distortion Applications. J. Circuits Syst. Comput. 25(3): 1640019:1-1640019:18 (2016) - [c42]Matej Rakus, Viera Stopjaková, Daniel Arbet:
Comparison of gate-driven and bulk-driven current mirror topologies. DDECS 2016: 27-30 - [c41]Daniel Arbet, Martin Kovác, Lukás Nagy, Viera Stopjaková, Juraj Brenkus:
Low-voltage bulk-driven variable gain amplifier in 130 nm CMOS technology. DDECS 2016: 40-45 - [c40]Juraj Brenkus, Viera Stopjaková, Lukás Nagy, Daniel Arbet:
Impedance calculation based method for AC fault analysis of mixed-signal circuits. DDECS 2016: 74-79 - [c39]Michal Sovcik, Michal Matuska, Daniel Arbet, Viera Stopjaková:
CMOS variable-gain amplifier for low-frequency applications. DDECS 2016: 243-246 - [c38]Lukás Kohútka, Viera Stopjaková:
Improved Task Scheduler for Dual-Core Real-Time Systems. DSD 2016: 471-478 - [c37]Daniel Arbet, Martin Kovác, Lukás Nagy, Viera Stopjaková, Michal Sovcik:
Variable-gain amplifier for ultra-low voltage applications in 130nm CMOS technology. MIPRO 2016: 51-56 - [c36]Lukás Kohútka, Viera Stopjaková:
Task scheduler for dual-core real-time systems. MIXDES 2016: 474-479 - 2015
- [j9]Daniel Arbet, Viera Stopjaková, Martin Kovác:
Investigation of the optimum oscillation frequency value towards increasing the efficiency of OBIST approach. Microelectron. Reliab. 55(7): 1120-1125 (2015) - [c35]Daniel Arbet, Gabriel Nagy, Martin Kovác, Viera Stopjaková:
Fully Differential Difference Amplifier for Low-Noise Applications. DDECS 2015: 57-62 - [c34]Lukás Nagy, Viera Stopjaková, Alexander Satka:
Design of In AlN/GaN Heterostructure-Based Logic Cells. DDECS 2015: 83-86 - [c33]Daniel Arbet, Gabriel Nagy, Martin Kovác, Viera Stopjaková, Lukás Nagy:
Readout interface for capacitive MEMS microphone in CMOS technology. MIXDES 2015: 370-374 - 2014
- [j8]Lukás Nagy, Viera Stopjaková, Juraj Brenkus:
Current Sensing Completion Detection in Single-Rail Asynchronous Systems. Comput. Informatics 33(5): 1116-1138 (2014) - [j7]Gábor Gyepes, Viera Stopjaková, Daniel Arbet, Libor Majer, Juraj Brenkus:
A new IDDT test approach and its efficiency in covering resistive opens in SRAM arrays. Microprocess. Microsystems 38(5): 359-367 (2014) - [j6]Daniel Arbet, Viera Stopjaková, Juraj Brenkus, Gábor Gyepes, Martin Kovác, Libor Majer:
BIST architecture for oscillation test of analog ICs and investigation of test hardware influence. Microelectron. Reliab. 54(5): 985-992 (2014) - [c32]Juraj Brenkus, Viera Stopjaková, Daniel Arbet, Gábor Gyepes, Libor Majer:
A novel impedance calculation method and its time efficiency evaluation. DDECS 2014: 99-103 - [c31]Martin Kovác, Daniel Arbet, Gabriel Nagy, Viera Stopjaková:
An approach towards selection of the oscillation frequency for oscillation test of analog ICs. DDECS 2014: 266-267 - [c30]Roman Záluský, Daniela Duracková, Viera Stopjaková, Lukás Nagy, Vladimír Sedlák:
Novel architecture of a digital neuron for FFNN employing special multiplication. ECAI 2014: 933-938 - 2013
- [j5]Lukás Nagy, Viera Stopjaková, Roman Záluský:
Completion detection in dual-rail asynchronous systems by current-sensing. Microelectron. J. 44(6): 538-544 (2013) - [c29]Gabriel Nagy, Daniel Arbet, Viera Stopjaková:
Digital methods of offset compensation in 90nm CMOS operational amplifiers. DDECS 2013: 124-127 - [c28]Juraj Brenkus, Viera Stopjaková, Gábor Gyepes:
Numerical method for DC fault analysis simplification and simulation time reduction. DDECS 2013: 170-174 - [c27]Daniel Arbet, Gabriel Nagy, Viera Stopjaková, Gábor Gyepes:
Efficiency of oscillation-based BIST in 90nm CMOS active analog filters. DDECS 2013: 263-266 - 2012
- [c26]Lukás Nagy, Viera Stopjaková:
Current sensing completion detection in dual-rail asynchronous systems. DDECS 2012: 38-41 - [c25]Gábor Gyepes, Daniel Arbet, Juraj Brenkus, Viera Stopjaková:
Application of IDDT test towards increasing SRAM reliability in nanometer technologies. DDECS 2012: 167-170 - [c24]Daniel Arbet, Gábor Gyepes, Juraj Brenkus, Viera Stopjaková:
OBIST strategy versus parametric test - Efficiency in covering catastrophic faults in active analog filters. DDECS 2012: 193-194 - [e1]Jaan Raik, Viera Stopjaková, Heinrich Theodor Vierhaus, Witold A. Pleskacz, Raimund Ubar, Helena Kruus, Maksim Jenihhin:
IEEE 15th International Symposium on Design and Diagnostics of Electronic Circuits & Systems, DDECS 2012, Tallinn, Estonia, April 18-20, 2012. IEEE 2012, ISBN 978-1-4673-1187-8 [contents] - 2011
- [c23]Daniel Arbet, Juraj Brenkus, Gábor Gyepes, Viera Stopjaková:
Increasing the efficiency of analog OBIST using on-chip compensation of technology variations. DDECS 2011: 71-74 - [c22]Gábor Gyepes, Juraj Brenkus, Daniel Arbet, Viera Stopjaková:
Comparison of iddt test efficiency in covering opens in SRAMs realised in two different technologies. DDECS 2011: 395-396 - [c21]Lukás Nagy, Viera Stopjaková:
Current sensing methodology for completion detection in self-timed systems. DDECS 2011: 405-406 - [c20]Erik Vavrinsky, Martin Daricek, Martin Donoval, Peter Telek, Viera Stopjaková, Vladimir Tvarozek:
Alternative methods for heart-rate sensing. ISABEL 2011: 30:1-30:2 - 2010
- [c19]Lukás Nagy, Viera Stopjaková:
Current Sensing Completion Detection in deep sub-micron technologies. DDECS 2010: 145-148 - [c18]Libor Majer, Viera Stopjaková:
The novel approach to wideband RFIC receivers in standard CMOS process. DDECS 2010: 181-184
2000 – 2009
- 2009
- [c17]Juraj Brenkus, Viera Stopjaková, Ronny Vanhooren, Anton Chichkov:
Comparison of different test strategies on a mixed-signal circuit. DDECS 2009: 16-19 - [c16]Martin Donoval, Martin Daricek, Juraj Marek, Viera Stopjaková:
Power devices current monitoring using horizontal and vertical magnetic force sensor. DDECS 2009: 124-127 - [c15]Martin Donoval, Martin Daricek, Juraj Marek, Viera Stopjaková:
Vertical and horizontal magnetic force sensor and application of sensor in power devices. ECCTD 2009: 519-522 - 2008
- [j4]Witold A. Pleskacz, Viera Stopjaková, Tomasz Borejko, Artur Jutman, Andrzej Walkanis:
DefSim: A Remote Laboratory for Studying Physical Defects in CMOS Digital Circuits. IEEE Trans. Ind. Electron. 55(6): 2405-2415 (2008) - [c14]Libor Majer, Viera Stopjaková:
Portable Measurement Equipment for Continuous Biomedical Monitoring using Microelectrodes. DDECS 2008: 26-29 - [c13]Marcin J. Beresinski, Tomasz Borejko, Witold A. Pleskacz, Viera Stopjaková:
Built-In Current Monitor for IDDQ Testing in CMOS 90 nm Technology. DDECS 2008: 259-262 - [c12]Juraj Brenkus, Viera Stopjaková, Jozef Mihálov:
Experimental Analog Circuit for Parametric Test Methods Efficiency Evaluation. DDECS 2008: 293-298 - [c11]Martin Donoval, Martin Daricek, Viera Stopjaková, Juraj Marek:
On-chip Integration of Magnetic Force Sensing Current Monitors. DDECS 2008: 310-313 - [c10]Martin Donoval, Martin Daricek, Viera Stopjaková, Juraj Marek:
On-chip supply current monitoring units using magnetic force sensing. ICECS 2008: 1229-1232 - [c9]Martin Simlastík, Viera Stopjaková:
Automated Synchronous-to-Asynchronous Circuits Conversion: A Survey. PATMOS 2008: 348-358 - 2007
- [c8]Martin Simlastík, Viera Stopjaková, Libor Majer, Peter Malík:
Clockless Implementation of LEON2 for Low-Power Applications. DDECS 2007: 215-218 - 2006
- [c7]Pavol Malosek, Viera Stopjaková:
PCA Data Preprocessing for Neural Network-based Detection of Parametric Defects in Analog IC. DDECS 2006: 131-135 - [c6]Vladislav Nagy, Viera Stopjaková:
New Current Monitor Using Auto Zero Voltage Comparator for IDD Testing of Mixed-signal Circuits. DDECS 2006: 236-237 - [c5]Witold A. Pleskacz, Tomasz Borejko, Andrzej Walkanis, Viera Stopjaková, Artur Jutman, Raimund Ubar:
DefSim: CMOS Defects on Chip for Research and Education. LATW 2006: 74-79 - 2005
- [j3]Viera Stopjaková, Pavol Malosek, Marek Matej, Vladislav Nagy, Martin Margala:
Defect detection in analog and mixed circuits by neural networks using wavelet analysis. IEEE Trans. Reliab. 54(3): 441-448 (2005) - 2004
- [j2]Viera Stopjaková, Pavol Malosek, Daniel Micusík, Marek Matej, Martin Margala:
Classification of Defective Analog Integrated Circuits Using Artificial Neural Networks. J. Electron. Test. 20(1): 25-37 (2004) - 2002
- [j1]Daniel Micusík, Viera Stopjaková, Lubica Benusková:
Application of Feed-forward Artificial Neural Networks to the Identification of Defective Analog Integrated Circuits. Neural Comput. Appl. 11(1): 71-79 (2002) - [c4]Viera Stopjaková, Daniel Micusík, Lubica Benusková, Martin Margala:
Neural Networks-Based Parametric Testing of Analog IC. DFT 2002: 408-418 - 2000
- [c3]Martin Margala, Srdjan Dragic, Ahmed El-Abasiry, Samuel Ekpe, Viera Stopjaková:
I-V Fast IDDQ Current Sensor for On-Line Mixed-Signal/Analog Test. IOLTW 2000: 92-93
1990 – 1999
- 1999
- [c2]Viera Stopjaková, Hans A. R. Manhaeve, M. Sidiropulos:
On-Chip Transient Current Monitor for Testing of Low Voltage CMOS IC. DATE 1999: 538-542 - 1997
- [c1]Viera Stopjaková, Hans A. R. Manhaeve:
CCII+ current conveyor based BIC monitor for IDDQ testing of complex CMOS circuits. ED&TC 1997: 266-270
Coauthor Index
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