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Zdenek Plíva
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2020 – today
- 2020
- [c9]Martin Hunek, Zdenek Plíva:
Detection of NAT64/DNS64 by SRV Records: Detection Using Global DNS Tree in the World Beyond Plain-Text DNS. CN 2020: 27-40
2010 – 2019
- 2018
- [j3]Ondrej Novák, Zdenek Plíva:
Test response compaction method with improved detection and diagnostic abilities. Microelectron. Reliab. 80: 249-256 (2018) - 2017
- [c8]Martin Hunek, Zdenek Plíva:
Design and optimisation of NiTi pressure gauge. DDECS 2017: 1-3 - [c7]Ondrej Novák, Zdenek Plíva:
Logic testing with test-per-clock pattern loading and improved diagnostic abilities. DDECS 2017: 54-59 - 2014
- [j2]Petr Pfeifer, Zdenek Plíva:
A new method for in situ measurement of parameters and degradation processes in modern nanoscale programmable devices. Microprocess. Microsystems 38(6): 605-619 (2014) - [c6]Petr Pfeifer, Zdenek Plíva, Pieter Weckx, Ben Kaczer:
On reliability enhancement using adaptive core voltage scaling and variations on nanoscale FPGAs. LATW 2014: 1-4 - 2013
- [c5]Petr Pfeifer, Zdenek Plíva, Mario Schölzel, Tobias Koal, Heinrich Theodor Vierhaus:
On performance estimation of a scalable VLIW soft-core in XILINX FPGAs. DDECS 2013: 181-186 - [c4]Petr Pfeifer, Zdenek Plíva:
On measurement of parameters of programmable microelectronic nanostructures under accelerating extreme conditions (Xilinx 28nm XC7Z020 Zynq FPGA). FPL 2013: 1-4 - 2012
- [c3]Petr Pfeifer, Zdenek Plíva:
On measurement of impact of the metallization and FPGA design to the changes of slice parameters and generation of delay faults. FPL 2012: 743-746
2000 – 2009
- 2006
- [c2]Ondrej Novák, Zdenek Plíva, Jiri Jenícek, Zbynek Mader, Michal Jarkovský:
Self Testing SoC with Reduced Memory Requirements and Minimized Hardware Overhead. DFT 2006: 300-308 - 2005
- [c1]Ondrej Novák, Jirí Zahrádka, Zdenek Plíva:
COMPAS - Compressed Test Pattern Sequencer for Scan Based Circuits. EDCC 2005: 403-414 - 2004
- [j1]Ondrej Novák, Zdenek Plíva, Jiri Nosek, Andrzej Hlawiczka, Tomasz Garbolino, Krzysztof Gucwa:
Test-Per-Clock Logic BIST with Semi-Deterministic Test Patterns and Zero-Aliasing Compactor. J. Electron. Test. 20(1): 109-122 (2004)
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