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ORCIDTobias Koal
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2010 – 2019
- 2016
[c25]Mario Schölzel, Tobias Koal, Sebastian Müller, Stefan Scharoba
, Stephanie Roder, Heinrich Theodor Vierhaus:
A comprehensive software-based self-test and self-repair method for statically scheduled superscalar processors. LATS 2016: 33-38- 2015
- [c24]Tobias Koal, Heinrich Theodor Vierhaus:
Redundancy evaluation process of processor components for permanent fault compensation. AHS 2015: 1-6 - [c23]Tobias Koal, Stefan Scharoba, Heinrich Theodor Vierhaus:
Combining Correction of Delay Faults and Transient Faults. DDECS 2015: 99-102 - [c22]Sebastian Müller, Tobias Koal, Stefan Scharoba, Heinrich Theodor Vierhaus, Mario Schölzel:
A multi-layer software-based fault-tolerance approach for heterogenous multi-core systems. LATS 2015: 1-6 - 2014
- [b1]Tobias Koal:
Effiziente Auswahl redundanter Komponenten für Prozessoren zur Kompensation permanenter Fehler. Brandenburg University of Technology, Cottbus - Senftenberg, Germany, 2014, pp. 1-183 - [c21]Tobias Koal, Mario Schölzel, Heinrich Theodor Vierhaus:
Combining fault tolerance and self repair at minimum cost in power and hardware. DDECS 2014: 153-158 - [c20]Mario Schölzel, Tobias Koal, Heinrich Theodor Vierhaus:
Diagnostic self-test for dynamically scheduled superscalar processors based on reconfiguration techniques for handling permanent faults. DFT 2014: 27-32 - [c19]Davide Sabena, Luca Sterpone, Mario Schölzel, Tobias Koal, Heinrich Theodor Vierhaus, S. Wong, Robért Glein, Florian Rittner, C. Stender, Mario Porrmann, Jens Hagemeyer:
Reconfigurable high performance architectures: How much are they ready for safety-critical applications? ETS 2014: 1-8 - [c18]Mario Schölzel, Tobias Koal, Heinrich Theodor Vierhaus:
Systematic generation of diagnostic software-based self-test routines for processor components. ETS 2014: 1-6 - [c17]Sebastian Müller, Tobias Koal, Mario Schölzel, Heinrich Theodor Vierhaus:
Timing for virtual TMR in logic circuits. IOLTS 2014: 190-193 - 2013
- [c16]Petr Pfeifer, Zdenek Plíva, Mario Schölzel, Tobias Koal, Heinrich Theodor Vierhaus:
On performance estimation of a scalable VLIW soft-core in XILINX FPGAs. DDECS 2013: 181-186 - [c15]Tobias Koal, Markus Ulbricht, Piet Engelke, Heinrich Theodor Vierhaus:
On the feasibility of combining on-line-test and self repair for logic circuits. DDECS 2013: 187-192 - [c14]Tobias Koal, Markus Ulbricht, Heinrich Theodor Vierhaus:
Virtual TMR Schemes Combining Fault Tolerance and Self Repair. DSD 2013: 235-242 - [c13]Mario Schölzel, Tobias Koal, Stephanie Roder, Heinrich Theodor Vierhaus:
Towards an automatic generation of diagnostic in-field SBST for processor components. LATW 2013: 1-6 - 2012
- [c12]Tobias Koal, Markus Ulbricht, Heinrich Theodor Vierhaus:
Combining on-line fault detection and logic self repair. DDECS 2012: 288-293 - [c11]Mario Schölzel, Tobias Koal, Heinrich Theodor Vierhaus:
An adaptive self-test routine for in-field diagnosis of permanent faults in simple RISC cores. DDECS 2012: 312-317 - [c10]Markus Ulbricht, Heinrich Theodor Vierhaus, Tobias Koal:
Activity Migration in M-of-N-Systems by Means of Load-Balancing. DSD 2012: 258-263 - 2011
- [c9]Markus Ulbricht, Mario Schölzel, Tobias Koal, Heinrich Theodor Vierhaus:
A new hierarchical built-in self-test with on-chip diagnosis for VLIW processors. DDECS 2011: 143-146 - [c8]Tobias Koal, Heinrich Theodor Vierhaus:
Optimal spare utilization for reliability and mean lifetime improvement of logic built-in self-repair. DDECS 2011: 219-224 - [c7]Tobias Koal, Daniel Scheit, Mario Schölzel, Heinrich Theodor Vierhaus:
On the Feasibility of Built-In Self Repair for Logic Circuits. DFT 2011: 316-324 - 2010
- [c6]Tobias Koal, Heinrich Theodor Vierhaus:
A software-based self-test and hardware reconfiguration solution for VLIW processors. DDECS 2010: 40-43 - [c5]Tobias Koal, Heinrich Theodor Vierhaus:
Combining de-stressing and self repair for long-term dependable systems. DDECS 2010: 99-104
2000 – 2009
- 2009
- [c4]Tobias Koal, Daniel Scheit, Heinrich Theodor Vierhaus:
A scheme of logic self repair including local interconnects. DDECS 2009: 8-11 - [c3]Tobias Koal, Daniel Scheit, Heinrich Theodor Vierhaus:
Reliability Estimation Process. DSD 2009: 221-224 - [c2]Tobias Koal, Heinrich Theodor Vierhaus, Daniel Scheit:
A Concept for Logic Self Repair. DSD 2009: 621-624 - 2008
- [c1]Tobias Koal, Heinrich Theodor Vierhaus:
Basic Architecture for Logic Self Repair. IOLTS 2008: 177-178
Coauthor Index
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