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2020 – today
- 2023
[j13]Michael Pellauer
, Jason Clemons, Vignesh Balaji, Neal Clayton Crago, Aamer Jaleel, Donghyuk Lee, Mike O'Connor, Anghsuman Parashar, Sean Treichler, Po-An Tsai, Stephen W. Keckler, Joel S. Emer:
Symphony: Orchestrating Sparse and Dense Tensors with Hierarchical Heterogeneous Processing. ACM Trans. Comput. Syst. 41: 4:1-4:30 (2023)- 2022
- [j12]Michael B. Sullivan, Nirmal R. Saxena, Mike O'Connor, Donghyuk Lee, Paul Racunas, Saurabh Hukerikar, Timothy Tsai, Siva Kumar Sastry Hari, Stephen W. Keckler:
Characterizing and Mitigating Soft Errors in GPU DRAM. IEEE Micro 42(4): 69-77 (2022) - [c36]Mike O'Connor, Donghyuk Lee, Niladrish Chatterjee, Michael B. Sullivan, Stephen W. Keckler:
Saving PAM4 Bus Energy with SMOREs: Sparse Multi-level Opportunistic Restricted Encodings. HPCA 2022: 1001-1013 - 2021
- [c35]Atefeh Mehrabi, Donghyuk Lee, Niladrish Chatterjee, Daniel J. Sorin, Benjamin C. Lee, Mike O'Connor:
Learning Sparse Matrix Row Permutations for Efficient SpMM on GPU Architectures. ISPASS 2021: 48-58 - [c34]Michael B. Sullivan, Nirmal R. Saxena, Mike O'Connor, Donghyuk Lee, Paul Racunas, Saurabh Hukerikar, Timothy Tsai, Siva Kumar Sastry Hari, Stephen W. Keckler:
Characterizing and Mitigating Soft Errors in GPU DRAM. MICRO 2021: 641-653 - 2020
- [c33]Esha Choukse, Michael B. Sullivan, Mike O'Connor, Mattan Erez, Jeff Pool, David W. Nellans, Stephen W. Keckler:
Buddy Compression: Enabling Larger Memory for Deep Learning and HPC Workloads on GPUs. ISCA 2020: 926-939
2010 – 2019
- 2019
- [c32]Sangkug Lym, Donghyuk Lee, Mike O'Connor, Niladrish Chatterjee, Mattan Erez:
DeLTA: GPU Performance Model for Deep Learning Applications with In-Depth Memory System Traffic Analysis. ISPASS 2019: 293-303 - [c31]Daichi Fujiki, Niladrish Chatterjee, Donghyuk Lee, Mike O'Connor:
Near-memory data transformation for efficient sparse matrix multi-vector multiplication. SC 2019: 55:1-55:17 - [i7]Esha Choukse, Michael B. Sullivan, Mike O'Connor, Mattan Erez, Jeff Pool, David W. Nellans, Stephen W. Keckler:
Buddy Compression: Enabling Larger Memory for Deep Learning and HPC Workloads on GPUs. CoRR abs/1903.02596 (2019) - [i6]Sangkug Lym, Donghyuk Lee, Mike O'Connor, Niladrish Chatterjee, Mattan Erez:
DeLTA: GPU Performance Model for Deep Learning Applications with In-depth Memory System Traffic Analysis. CoRR abs/1904.01691 (2019) - 2018
- [j11]Saugata Ghose, Abdullah Giray Yaglikçi, Raghav Gupta, Donghyuk Lee, Kais Kudrolli, William X. Liu, Hasan Hassan, Kevin K. Chang, Niladrish Chatterjee, Aditya Agrawal, Mike O'Connor, Onur Mutlu:
What Your DRAM Power Models Are Not Telling You: Lessons from a Detailed Experimental Study. Proc. ACM Meas. Anal. Comput. Syst. 2(3): 38:1-38:41 (2018) - [c30]Donghyuk Lee, Mike O'Connor, Niladrish Chatterjee:
Reducing Data Transfer Energy by Exploiting Similarity within a Data Transaction. HPCA 2018: 40-51 - [c29]Minsoo Rhu, Mike O'Connor, Niladrish Chatterjee, Jeff Pool, Youngeun Kwon, Stephen W. Keckler:
Compressing DMA Engine: Leveraging Activation Sparsity for Training Deep Neural Networks. HPCA 2018: 78-91 - [c28]Saugata Ghose, Abdullah Giray Yaglikçi, Raghav Gupta, Donghyuk Lee, Kais Kudrolli, William X. Liu, Hasan Hassan, Kevin K. Chang, Niladrish Chatterjee, Aditya Agrawal, Mike O'Connor, Onur Mutlu:
What Your DRAM Power Models Are Not Telling You: Lessons from a Detailed Experimental Study. SIGMETRICS (Abstracts) 2018: 110 - [i5]Kevin K. Chang, Abdullah Giray Yaglikçi, Saugata Ghose, Aditya Agrawal, Niladrish Chatterjee, Abhijith Kashyap, Donghyuk Lee, Mike O'Connor, Hasan Hassan, Onur Mutlu:
Voltron: Understanding and Exploiting the Voltage-Latency-Reliability Trade-Offs in Modern DRAM Chips to Improve Energy Efficiency. CoRR abs/1805.03175 (2018) - [i4]Saugata Ghose, Abdullah Giray Yaglikçi, Raghav Gupta, Donghyuk Lee, Kais Kudrolli, William X. Liu, Hasan Hassan, Kevin K. Chang, Niladrish Chatterjee, Aditya Agrawal, Mike O'Connor, Onur Mutlu:
What Your DRAM Power Models Are Not Telling You: Lessons from a Detailed Experimental Study. CoRR abs/1807.05102 (2018) - 2017
- [j10]Kevin K. Chang, Abdullah Giray Yaglikçi, Saugata Ghose, Aditya Agrawal, Niladrish Chatterjee, Abhijith Kashyap, Donghyuk Lee, Mike O'Connor, Hasan Hassan, Onur Mutlu:
Understanding Reduced-Voltage Operation in Modern DRAM Devices: Experimental Characterization, Analysis, and Mechanisms. Proc. ACM Meas. Anal. Comput. Syst. 1(1): 10:1-10:42 (2017) - [c27]Niladrish Chatterjee, Mike O'Connor, Donghyuk Lee, Daniel R. Johnson, Stephen W. Keckler, Minsoo Rhu, William J. Dally:
Architecting an Energy-Efficient DRAM System for GPUs. HPCA 2017: 73-84 - [c26]Mike O'Connor, Niladrish Chatterjee, Donghyuk Lee, John M. Wilson, Aditya Agrawal, Stephen W. Keckler, William J. Dally:
Fine-grained DRAM: energy-efficient DRAM for extreme bandwidth systems. MICRO 2017: 41-54 - [c25]Gwangsun Kim, Niladrish Chatterjee, Mike O'Connor, Kevin Hsieh:
Toward standardized near-data processing with unrestricted data placement for GPUs. SC 2017: 24 - [c24]Kevin K. Chang, Abdullah Giray Yaglikçi, Saugata Ghose, Aditya Agrawal, Niladrish Chatterjee, Abhijith Kashyap, Donghyuk Lee, Mike O'Connor, Hasan Hassan, Onur Mutlu:
Understanding Reduced-Voltage Operation in Modern DRAM Devices: Experimental Characterization, Analysis, and Mechanisms. SIGMETRICS (Abstracts) 2017: 52 - [i3]Minsoo Rhu, Mike O'Connor, Niladrish Chatterjee, Jeff Pool, Stephen W. Keckler:
Compressing DMA Engine: Leveraging Activation Sparsity for Training Deep Neural Networks. CoRR abs/1705.01626 (2017) - [i2]Kevin K. Chang, Abdullah Giray Yaglikçi, Saugata Ghose, Aditya Agrawal, Niladrish Chatterjee, Abhijith Kashyap, Donghyuk Lee, Mike O'Connor, Hasan Hassan, Onur Mutlu:
Understanding Reduced-Voltage Operation in Modern DRAM Chips: Characterization, Analysis, and Mechanisms. CoRR abs/1705.10292 (2017) - 2016
- [c23]Kevin Hsieh, Eiman Ebrahimi, Gwangsun Kim, Niladrish Chatterjee, Mike O'Connor, Nandita Vijaykumar, Onur Mutlu, Stephen W. Keckler:
Transparent Offloading and Mapping (TOM): Enabling Programmer-Transparent Near-Data Processing in GPU Systems. ISCA 2016: 204-216 - [c22]Aditya Agrawal, Mike O'Connor, Evgeny Bolotin, Niladrish Chatterjee, Joel S. Emer, Stephen W. Keckler:
CLARA: Circular Linked-List Auto and Self Refresh Architecture. MEMSYS 2016: 338-349 - [i1]Kevin Kai-Wei Chang, Gabriel H. Loh, Mithuna Thottethodi, Yasuko Eckert, Mike O'Connor, Srilatha Manne, Lisa Hsu, Lavanya Subramanian, Onur Mutlu:
Enabling Efficient Dynamic Resizing of Large DRAM Caches via A Hardware Consistent Hashing Mechanism. CoRR abs/1602.00722 (2016) - 2015
- [j9]Gennady Pekhimenko, Evgeny Bolotin, Mike O'Connor, Onur Mutlu, Todd C. Mowry, Stephen W. Keckler:
Toggle-Aware Compression for GPUs. IEEE Comput. Archit. Lett. 14(2): 164-168 (2015) - [j8]Evgeny Bolotin, David W. Nellans, Oreste Villa, Mike O'Connor, Alex Ramírez, Stephen W. Keckler:
Designing Efficient Heterogeneous Memory Architectures. IEEE Micro 35(4): 60-68 (2015) - [c21]Mike O'Connor, Earl E. Swartzlander Jr.:
Exploiting asymmetry in Booth-encoded multipliers for reduced energy multiplication. ACSSC 2015: 722-726 - [c20]Neha Agarwal, David W. Nellans, Mark Stephenson, Mike O'Connor, Stephen W. Keckler:
Page Placement Strategies for GPUs within Heterogeneous Memory Systems. ASPLOS 2015: 607-618 - [c19]Tayler H. Hetherington, Mike O'Connor, Tor M. Aamodt:
MemcachedGPU: scaling-up scale-out key-value stores. SoCC 2015: 43-57 - [c18]Dong Li, Minsoo Rhu, Daniel R. Johnson, Mike O'Connor, Mattan Erez, Doug Burger, Donald S. Fussell, Stephen W. Redder:
Priority-based cache allocation in throughput processors. HPCA 2015: 89-100 - [c17]Neha Agarwal, David W. Nellans, Mike O'Connor, Stephen W. Keckler, Thomas F. Wenisch:
Unlocking bandwidth for GPUs in CC-NUMA systems. HPCA 2015: 354-365 - [c16]Mark Stephenson, Siva Kumar Sastry Hari, Yunsup Lee, Eiman Ebrahimi, Daniel R. Johnson, David W. Nellans, Mike O'Connor, Stephen W. Keckler:
Flexible software profiling of GPU architectures. ISCA 2015: 185-197 - [c15]Timothy G. Rogers, Daniel R. Johnson, Mike O'Connor, Stephen W. Keckler:
A variable warp size architecture. ISCA 2015: 489-501 - 2014
- [j7]Timothy G. Rogers, Mike O'Connor, Tor M. Aamodt:
Learning your limit: managing massively multithreaded caches through scheduling. Commun. ACM 57(12): 91-98 (2014) - [j6]Inderpreet Singh, Arrvindh Shriraman, Wilson W. L. Fung, Mike O'Connor, Tor M. Aamodt:
Cache Coherence for GPU Architectures. IEEE Micro 34(3): 69-79 (2014) - [j5]Jaewoong Sim, Gabriel H. Loh, Vilas Sridharan, Mike O'Connor:
A Configurable and Strong RAS Solution for Die-Stacked DRAM Caches. IEEE Micro 34(3): 80-90 (2014) - [c14]Ahmed ElTantawy, Jessica Wenjie Ma, Mike O'Connor, Tor M. Aamodt:
A scalable multi-path microarchitecture for efficient GPU control flow. HPCA 2014: 248-259 - [c13]Niladrish Chatterjee, Mike O'Connor, Gabriel H. Loh, Nuwan Jayasena, Rajeev Balasubramonian:
Managing DRAM Latency Divergence in Irregular GPGPU Applications. SC 2014: 128-139 - [c12]Oreste Villa, Daniel R. Johnson, Mike O'Connor, Evgeny Bolotin, David W. Nellans, Justin Luitjens, Nikolai Sakharnykh, Peng Wang, Paulius Micikevicius, Anthony Scudiero, Stephen W. Keckler, William J. Dally:
Scaling the Power Wall: A Path to Exascale. SC 2014: 830-841 - 2013
- [j4]Timothy G. Rogers, Mike O'Connor, Tor M. Aamodt:
Cache-Conscious Thread Scheduling for Massively Multithreaded Processors. IEEE Micro 33(3): 78-85 (2013) - [c11]Hadi Jooybar, Wilson W. L. Fung, Mike O'Connor, Joseph Devietti, Tor M. Aamodt:
GPUDet: a deterministic GPU architecture. ASPLOS 2013: 1-12 - [c10]Inderpreet Singh, Arrvindh Shriraman, Wilson W. L. Fung, Mike O'Connor, Tor M. Aamodt:
Cache coherence for GPU architectures. HPCA 2013: 578-590 - [c9]Jaewoong Sim, Gabriel H. Loh, Vilas Sridharan, Mike O'Connor:
Resilient die-stacked DRAM caches. ISCA 2013: 416-427 - [c8]Timothy G. Rogers, Mike O'Connor, Tor M. Aamodt:
Divergence-aware warp scheduling. MICRO 2013: 99-110 - 2012
- [c7]Mike O'Connor:
Accelerated processing and the Fusion System Architecture. ASP-DAC 2012: 93 - [c6]Tayler H. Hetherington, Timothy G. Rogers, Lisa Hsu, Mike O'Connor, Tor M. Aamodt:
Characterizing and evaluating a key-value store application on heterogeneous CPU-GPU systems. ISPASS 2012: 88-98 - [c5]Timothy G. Rogers, Mike O'Connor, Tor M. Aamodt:
Cache-Conscious Wavefront Scheduling. MICRO 2012: 72-83 - [c4]Jaewoong Sim, Gabriel H. Loh, Hyesoon Kim, Mike O'Connor, Mithuna Thottethodi:
A Mostly-Clean DRAM Cache for Effective Hit Speculation and Self-Balancing Dispatch. MICRO 2012: 247-257
2000 – 2009
- 2006
- [c3]William E. Johnston, Joe Metzger, Mike O'Connor, Michael Collins, Joseph Burrescia, Eli Dart, Jim Gagliardi, Chin Guok, Kevin Oberman:
Network Communication as a Service-Oriented Capability. High Performance Computing Workshop 2006: 96-127 - 2001
- [j3]Mike O'Connor, Christopher A. Gomez:
The iFlow Address Processor. IEEE Micro 21(2): 16-23 (2001)
1990 – 1999
- 1999
- [j2]Sudheendra Hangal, Mike O'Connor:
Performance analysis and validation of the picoJava processor. IEEE Micro 19(3): 66-72 (1999) - 1998
- [j1]Harlan McGhan, Mike O'Connor:
PicoJava: A Direct Execution Engine For Java Bytecode. Computer 31(10): 22-30 (1998) - [c2]Chad Childers, Linda Bangert, Mike O'Connor:
Tracking Web Usage with Network Flight Recorder. WebNet 1998 - 1997
- [c1]Chad Childers, Iain O'Cain, Linda Bangert, Mike O'Connor:
Open Standard Content Cookies: Utility vs. Privacy. WebNet 1997
Coauthor Index
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