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Evgeny Bolotin
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2020 – today
- 2023
- [c17]Yaosheng Fu, Evgeny Bolotin, Aamer Jaleel, Gal Dalal, Shie Mannor, Jacob Subag, Noam Korem, Michael Behar, David W. Nellans:
AutoScratch: ML-Optimized Cache Management for Inference-Oriented GPUs. MLSys 2023 - 2022
- [j8]Yaosheng Fu, Evgeny Bolotin, Niladrish Chatterjee, David W. Nellans, Stephen W. Keckler:
GPU Domain Specialization via Composable On-Package Architecture. ACM Trans. Archit. Code Optim. 19(1): 4:1-4:23 (2022) - 2021
- [c16]Oreste Villa, Daniel Lustig, Zi Yan, Evgeny Bolotin, Yaosheng Fu, Niladrish Chatterjee, Nan Jiang, David W. Nellans:
Need for Speed: Experiences Building a Trustworthy System-Level GPU Simulator. HPCA 2021: 868-880 - [i2]Yaosheng Fu, Evgeny Bolotin, Niladrish Chatterjee, David W. Nellans, Stephen W. Keckler:
GPU Domain Specialization via Composable On-Package Architecture. CoRR abs/2104.02188 (2021) - 2020
- [c15]Xiaowei Ren, Daniel Lustig, Evgeny Bolotin, Aamer Jaleel, Oreste Villa, David W. Nellans:
HMG: Extending Cache Coherence Protocols Across Modern Hierarchical Multi-GPU Systems. HPCA 2020: 582-595 - [i1]Ahmet Fatih Inci, Evgeny Bolotin, Yaosheng Fu, Gal Dalal, Shie Mannor, David W. Nellans, Diana Marculescu:
The Architectural Implications of Distributed Reinforcement Learning on CPU-GPU Systems. CoRR abs/2012.04210 (2020)
2010 – 2019
- 2019
- [c14]Akhil Arunkumar, Evgeny Bolotin, David W. Nellans, Carole-Jean Wu:
Understanding the Future of Energy Efficiency in Multi-Module GPUs. HPCA 2019: 519-532 - 2018
- [c13]Vinson Young, Aamer Jaleel, Evgeny Bolotin, Eiman Ebrahimi, David W. Nellans, Oreste Villa:
Combining HW/SW Mechanisms to Improve NUMA Performance of Multi-GPU Systems. MICRO 2018: 339-351 - 2017
- [c12]Akhil Arunkumar, Evgeny Bolotin, Benjamin Y. Cho, Ugljesa Milic, Eiman Ebrahimi, Oreste Villa, Aamer Jaleel, Carole-Jean Wu, David W. Nellans:
MCM-GPU: Multi-Chip-Module GPUs for Continued Performance Scalability. ISCA 2017: 320-332 - [c11]Ugljesa Milic, Oreste Villa, Evgeny Bolotin, Akhil Arunkumar, Eiman Ebrahimi, Aamer Jaleel, Alex Ramírez, David W. Nellans:
Beyond the socket: NUMA-aware GPUs. MICRO 2017: 123-135 - 2016
- [c10]Gennady Pekhimenko, Evgeny Bolotin, Nandita Vijaykumar, Onur Mutlu, Todd C. Mowry, Stephen W. Keckler:
A case for toggle-aware compression for GPU systems. HPCA 2016: 188-200 - [c9]Aditya Agrawal, Mike O'Connor, Evgeny Bolotin, Niladrish Chatterjee, Joel S. Emer, Stephen W. Keckler:
CLARA: Circular Linked-List Auto and Self Refresh Architecture. MEMSYS 2016: 338-349 - 2015
- [j7]Gennady Pekhimenko, Evgeny Bolotin, Mike O'Connor, Onur Mutlu, Todd C. Mowry, Stephen W. Keckler:
Toggle-Aware Compression for GPUs. IEEE Comput. Archit. Lett. 14(2): 164-168 (2015) - [j6]Evgeny Bolotin, David W. Nellans, Oreste Villa, Mike O'Connor, Alex Ramírez, Stephen W. Keckler:
Designing Efficient Heterogeneous Memory Architectures. IEEE Micro 35(4): 60-68 (2015) - [c8]Adwait Jog, Onur Kayiran, Tuba Kesten, Ashutosh Pattnaik, Evgeny Bolotin, Niladrish Chatterjee, Stephen W. Keckler, Mahmut T. Kandemir, Chita R. Das:
Anatomy of GPU Memory System for Multi-Application Execution. MEMSYS 2015: 223-234 - 2014
- [c7]Adwait Jog, Evgeny Bolotin, Zvika Guz, Mike Parker, Stephen W. Keckler, Mahmut T. Kandemir, Chita R. Das:
Application-aware Memory System for Fair and Efficient Execution of Concurrent GPGPU Applications. GPGPU@ASPLOS 2014: 1 - [c6]Oreste Villa, Daniel R. Johnson, Mike O'Connor, Evgeny Bolotin, David W. Nellans, Justin Luitjens, Nikolai Sakharnykh, Peng Wang, Paulius Micikevicius, Anthony Scudiero, Stephen W. Keckler, William J. Dally:
Scaling the Power Wall: A Path to Exascale. SC 2014: 830-841 - 2012
- [j5]Roman Malits, Evgeny Bolotin, Avinoam Kolodny, Avi Mendelson:
Exploring the limits of GPGPU scheduling in control flow bound applications. ACM Trans. Archit. Code Optim. 8(4): 29:1-29:22 (2012)
2000 – 2009
- 2009
- [j4]Zvika Guz, Evgeny Bolotin, Idit Keidar, Avinoam Kolodny, Avi Mendelson, Uri C. Weiser:
Many-Core vs. Many-Thread Machines: Stay Away From the Valley. IEEE Comput. Archit. Lett. 8(1): 25-28 (2009) - 2007
- [j3]Zvika Guz, Isask'har Walter, Evgeny Bolotin, Israel Cidon, Ran Ginosar, Avinoam Kolodny:
Network Delays and Link Capacities in Application-Specific Wormhole NoCs. VLSI Design 2007: 90941:1-90941:15 (2007) - [c5]Evgeny Bolotin, Israel Cidon, Ran Ginosar, Avinoam Kolodny:
Routing table minimization for irregular mesh NoCs. DATE 2007: 942-947 - [c4]Evgeny Bolotin, Zvika Guz, Israel Cidon, Ran Ginosar, Avinoam Kolodny:
The Power of Priority: NoC Based Distributed Cache Coherency. NOCS 2007: 117-126 - 2006
- [c3]Zvika Guz, Isask'har Walter, Evgeny Bolotin, Israel Cidon, Ran Ginosar, Avinoam Kolodny:
Efficient link capacity and QoS design for network-on-chip. DATE 2006: 9-14 - 2004
- [j2]Evgeny Bolotin, Israel Cidon, Ran Ginosar, Avinoam Kolodny:
Cost considerations in network on chip. Integr. 38(1): 19-42 (2004) - [j1]Evgeny Bolotin, Israel Cidon, Ran Ginosar, Avinoam Kolodny:
QNoC: QoS architecture and design process for network on chip. J. Syst. Archit. 50(2-3): 105-128 (2004) - [c2]Evgeny Bolotin, Arkadiy Morgenshtein, Israel Cidon, Ran Ginosar, Avinoam Kolodny:
Automatic hardware-efficient SoC integration by QoS network on chip. ICECS 2004: 479-482 - [c1]Arkadiy Morgenshtein, Evgeny Bolotin, Israel Cidon, Avinoam Kolodny, Ran Ginosar:
Micro-modem - reliability solution for NoC communications. ICECS 2004: 483-486
Coauthor Index
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