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ORCIDAntonio Núñez
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2010 – 2019
- 2019
[c28]Raquel León
, Adrián Domínguez, Pedro P. Carballo, Antonio Núñez:
Deep Packet Inspection Through Virtual Platforms using System-On-Chip FPGAs. DCIS 2019: 1-6- 2017
- [c27]Adrián Domínguez, Pedro P. Carballo, Antonio Núñez:
Programmable SoC platform for deep packet inspection using enhanced Boyer-Moore algorithm. ReCoSoC 2017: 1-8 - 2014
- [j24]Zai Jian Jia, Antonio Núñez, Tomás Bautista, Andy D. Pimentel:
A two-phase design space exploration strategy for system-level real-time application mapping onto MPSoC. Microprocess. Microsystems 38(1): 9-21 (2014) - 2013
- [j23]Zai Jian Jia, Tomás Bautista, Antonio Núñez, Andy D. Pimentel, Mark Thompson:
A system-level infrastructure for multidimensional MP-SoC design space co-exploration. ACM Trans. Embed. Comput. Syst. 13(1s): 27:1-27:26 (2013) - [c26]Pedro P. Carballo, Omar Espino, Romén Neris, Pedro Hernandez-Fernandez, Tomasz Szydzik, Antonio Núñez:
Scalable Video Coding Deblocking Filter FPGA and ASIC Implementation Using High-Level Synthesis Methodology. DSD 2013: 415-422 - [c25]Tomasz Szydzik, Antonio Núñez, Lode De Paepe, Luigi Albani:
Contributions to visualization algorithm enabling GPU-accelerated image displaying for dual panel high dynamic range LCD display. ISPA 2013: 483-488 - 2011
- [j22]Tomasz Szydzik, Gustavo M. Callicó, Antonio Núñez:
Efficient FPGA implementation of a high-quality super-resolution algorithm with real-time performance. IEEE Trans. Consumer Electron. 57(2): 664-672 (2011) - [c24]Tomasz Szydzik, Gustavo M. Callicó, Antonio Núñez:
A Low Memory Requirements Execution Flow for the Non-Uniform Grid Projection Super-Resolution Algorithm. ISM 2011: 85-90 - 2010
- [c23]Zai Jian Jia, Andy D. Pimentel, Mark Thompson, Tomás Bautista, Antonio Núñez:
NASA: A generic infrastructure for system-level MP-SoC design space exploration. ESTIMedia 2010: 41-50
2000 – 2009
- 2009
- [c22]Zai Jian Jia, Tomás Bautista, Antonio Núñez, Cayetano Guerra, Mario Hernández:
Real-time visual tracking system modelling in MPSoC using platform based design. Real-Time Image and Video Processing 2009: 72440G - [e1]Antonio Núñez, Pedro P. Carballo:
12th Euromicro Conference on Digital System Design, Architectures, Methods and Tools, DSD 2009, 27-29 August 2009, Patras, Greece. IEEE Computer Society 2009, ISBN 978-0-7695-3782-5 [contents] - 2008
- [c21]Zai Jian Jia, Tomás Bautista, Antonio Núñez, Cayetano Guerra, Mario Hernández:
Design Space Exploration and Performance Analysis for the Modular Design of CVS in a Heterogeneous MPSoC. ReConFig 2008: 193-198 - 2007
- [j21]Leonel Augusto Sousa, Noel E. O'Connor, Marco Mattavelli, Antonio Núñez:
Embedded Systems for Portable and Mobile Video Platforms. EURASIP J. Embed. Syst. 2007 (2007) - [j20]Luz García, Gustavo M. Callicó, Dácil Barreto, Víctor Reyes, Tomás Bautista, Antonio Núñez:
Towards a configurable SoC MPEG-4 advanced simple profile decoder. IET Comput. Digit. Tech. 1(5): 451-460 (2007) - 2006
- [j19]Gustavo M. Callicó, Rafael Peset Llopis, Sebastián López, José Francisco López, Antonio Núñez, Ramanathan Sethuraman, Roberto Sarmiento:
Low-Cost Super-Resolution Algorithms Implementation Over a HW/SW Video Compression Platform. EURASIP J. Adv. Signal Process. 2006 (2006) - [j18]Antonio Núñez:
Advances in video coding for hand-held device implementation in networked electronic media. J. Real Time Image Process. 1(1): 9-23 (2006) - [c20]Víctor Reyes, Wido Kruijtzer, Tomás Bautista, Ghiath Alkadi, Antonio Núñez:
A unified system-level modeling and simulation environment for MPSoC design: MPEG-4 decoder case study. DATE 2006: 474-479 - [c19]Armando Sánchez-Peña, Pedro P. Carballo, Luz García, Antonio Núñez:
VIPACES, Verification Interface Primitives for the Development of AXI Compliant Elements and Systems. DSD 2006: 305-312 - 2005
- [c18]Víctor Reyes, Tomás Bautista, Gustavo Marrero Callicó, Antonio Núñez, Wido Kruijtzer:
A multicast inter-task communication protocol for embedded multiprocessor systems. CODES+ISSS 2005: 267-272 - [c17]Sebastián López, Gustavo M. Callicó, José Francisco López, Roberto Sarmiento, Antonio Núñez:
Low-cost implementation of a super-resolution algorithm for real-time video applications. ISCAS (6) 2005: 6130-6133 - 2003
- [j17]Bart D. Theelen, A. C. Verschueren, V. V. Reyes Suárez, M. P. J. Stevens, Antonio Núñez:
A scalable single-chip multi-processor architecture with on-chip RTOS kernel. J. Syst. Archit. 49(12-15): 619-639 (2003) - [c16]Víctor Reyes, Tomás Bautista, Antonio Núñez:
A Scalable Communication Platform for High Performance Multimedia Applications. ESTIMedia 2003: 134-140 - [c15]Jörn Jachalsky, Martin Wahler, Peter Pirsch, S. Capperon, Winfried Gehrke, W. M. Kruijtzer, Antonio Núñez:
A core for ambient and mobile intelligent imaging applications. ICME 2003: 1-4 - [c14]Gustavo M. Callicó, Antonio Núñez, Rafael Peset Llopis, Ramanathan Sethuraman:
Low-Cost and Real-Time Super-Resolution over a Video Encoder IP. ISQED 2003: 79-84 - 2002
- [c13]José R. Sendra, Javier del Pino, Antonio Hernández, Javier Hernández, Jaime Aguilera, Andrés Garcia-Alonso, Antonio Núñez:
Integrated Inductors Modeling and Tools for Automatic Selection and Layout Generation. ISQED 2002: 400-404 - 2001
- [j16]Tomás Bautista, Antonio Núñez:
Quantitative study of the impact of design and synthesis options on processor core performance. IEEE Trans. Very Large Scale Integr. Syst. 9(3): 461-473 (2001) - [c12]Juan A. Montiel-Nelson, De de Armas, Roberto Sarmiento, Antonio Núñez, Saeid Nooshabadi:
A compact layout technique to minimize high frequency switching effects in high speed circuits. ISCAS (4) 2001: 96-99 - [c11]Juan A. Montiel-Nelson, V. de Armas, Roberto Sarmiento, Antonio Núñez:
A Compact Layout Technique for Reducing Switching Current Effects in High Speed Circuits. ISQED 2001: 223-228 - 2000
- [c10]Saeid Nooshabadi, Juan A. Montiel-Nelson, Antonio Núñez, Roberto Sarmiento, Javier Sosa:
A Single Phase Latch for High Speed GaAs Domino Circuits. DATE 2000: 760 - [c9]Tomás Bautista, Antonio Núñez:
Synthesis Experiments and Performance Metrics for Evaluating the Quality of IP Blocks and Megacells. ISQED 2000: 217-226
1990 – 1999
- 1999
- [c8]Tomás Bautista, Antonio Núñez:
Flexible design of SPARC cores: a quantitative study. CODES 1999: 43-47 - [c7]Juan A. Montiel-Nelson, Saeid Nooshabadi, V. de Armas, Roberto Sarmiento, Antonio Núñez:
High Speed GaAs Subsystem Design using Feed Through Logic. DATE 1999: 509- - [c6]Tomás Bautista, Antonio Núñez:
Design of Efficient SPARC Cores for Embedded Systems. EUROMICRO 1999: 1236-1239 - [c5]José Francisco López, Roberto Sarmiento, Antonio Núñez, Kamran Eshraghian, Stefan Lachowicz, Derek Abbott:
Low Power Techniques for Digital GaAs VLSI. Great Lakes Symposium on VLSI 1999: 321-324 - 1998
- [j15]Roberto Sarmiento, V. de Armas, José Francisco López, Juan A. Montiel-Nelson, Antonio Núñez:
A CORDIC processor for FFT computation and its implementation using gallium arsenide technology. IEEE Trans. Very Large Scale Integr. Syst. 6(1): 18-30 (1998) - [c4]Juan A. Montiel-Nelson, V. de Armas, Roberto Sarmiento, Antonio Núñez:
A Cell and Macrocell Compiler for GaAs VLSI Full-Custom Design. DATE 1998: 947-948 - [c3]Juan A. Montiel-Nelson, Valentin de Armas, Roberto Sarmiento, Antonio Núñez:
OLYMPO: a GaAs compiler for VLSI design. ICECS 1998: 385-388 - 1997
- [j14]José Francisco López, Roberto Sarmiento, Kamran Eshraghian, Antonio Núñez:
Noise margin enhancement in GaAs ROM's using current mode logic. IEEE J. Solid State Circuits 32(4): 592-597 (1997) - [j13]José Francisco López, Kamran Eshraghian, Roberto Sarmiento, Antonio Núñez, Derek Abbott:
GaAs pseudodynamic latched logic for high performance processor cores. IEEE J. Solid State Circuits 32(8): 1297-1303 (1997) - 1993
- [j12]Antonio Hernández, Luis Gómez, Antonio Núñez:
An empirical model to estimate power consumption in GaAs DCFL/SDCFL circuits. Microprocess. Microprogramming 37(1-5): 23-26 (1993) - [j11]Pedro P. Carballo, Roberto Sarmiento, Antonio Núñez:
Integer and control units for a GaAs 32-bit RISC processor. Microprocess. Microprogramming 37(1-5): 105-108 (1993) - [j10]Antonio Núñez, Don Fay:
Letter from the short notes editors, Euromicro '92. Microprocess. Microprogramming 37(1-5): v (1993) - [j9]Luis Gómez, Antonio Hernández, Antonio Núñez:
Timing analysis for DCFL/SDCFL VLSI circuits. Microprocess. Microprogramming 38(1-5): 511-518 (1993) - [j8]Luis Gómez, Antonio Hernández, Antonio Núñez:
Multiobjective optimization using analytical models of GaAs high-speed digital circuits. Microprocess. Microprogramming 39(2-5): 267-270 (1993) - [c2]Antonio Hernández, Luis Gómez, Antonio Núñez:
GASTIM: A timing analyzer for GaAs digital circuits. EURO-DAC 1993: 190-195 - [c1]Juan A. Montiel-Nelson, Valentin de Armas, D. Q. M. Fay, Antonio Núñez:
Using the ES2 library and SILOS simulator in the development of a single chip with three processors and analog IO. PDP 1993: 359-368 - 1992
- [j7]Luis Gómez, Antonio Hernández, Antonio Núñez:
Timimg model for SDCFL digital circuits. Microprocess. Microprogramming 34(1-5): 193-196 (1992) - 1991
- [j6]Luis Ferragut, Rafael Montenegro, G. Winter, Antonio Núñez:
Accurate extraction of interconnect capacitances by adaptive mixed F.E.M. Microprocessing and Microprogramming 32(1-5): 61-68 (1991) - [j5]K. Eshraghian, Roberto Sarmiento, Pedro P. Carballo, Antonio Núñez:
Speed-area-power optimization for DCFL and SDCFL class of logic using ring notation. Microprocessing and Microprogramming 32(1-5): 75-82 (1991) - [j4]Antonio Núñez:
Program chairman's introduction. Microprocessing and Microprogramming 32(1-5): ix-x (1991)
1980 – 1989
- 1989
- [j3]Antonio Núñez, Roberto Sarmiento, Pedro P. Carballo:
Some results in GaAs processor design using LSI integrated circuits. Microprocess. Microprogramming 25(1-5): 127-132 (1989) - [j2]Antonio Núñez, David Carnal:
MVM: A GaAs microprocessor for critical real-time applications. Microprocessing and Microprogramming 27(1-5): 289-298 (1989) - 1987
- [j1]Antonio Núñez:
A survey of GaAs computer designs. Microprocess. Microprogramming 21(1-5): 665-670 (1987)
Coauthor Index
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