"Scalable Video Coding Deblocking Filter FPGA and ASIC Implementation Using ..."

Pedro P. Carballo et al. (2013)

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DOI: 10.1109/DSD.2013.52

access: closed

type: Conference or Workshop Paper

metadata version: 2023-03-23

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  - https://dblp.org/rec/conf/dsd/CarballoENHSN13
Pedro P. Carballo, Omar Espino, Romén Neris, Pedro Hernandez-Fernandez, Tomasz Szydzik, Antonio Núñez:
Scalable Video Coding Deblocking Filter FPGA and ASIC Implementation Using High-Level Synthesis Methodology. DSD 2013: 415-422

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