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Zhiyuan Yang 0001
Person information
- affiliation: University of Maryland, Department of Electrical & Computer Engineering, College Park, MD, USA
Other persons with the same name
- Zhiyuan Yang — disambiguation page
- Zhiyuan Yang 0002 — Guangdong Electric Power Design Institute Company, Guangzhou, China (and 1 more)
- Zhiyuan Yang 0003 — City University of Hong Kong, Department of Computer Science, Hong Kong
- Zhiyuan Yang 0004 — Universal Village Society, Cambridge, MA, USA
- Zhiyuan Yang 0005 — Southwestern University of Finance and Economics, Chengdu, China
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2020 – today
- 2024
- [i2]Ping Guo, Zhiyuan Yang, Xi Lin, Qingchuan Zhao, Qingfu Zhang:
PuriDefense: Randomized Local Implicit Adversarial Purification for Defending Black-box Query-based Attacks. CoRR abs/2401.10586 (2024) - [i1]Ping Guo, Cheng Gong, Xi Lin, Zhiyuan Yang, Qingfu Zhang:
Exploring the Adversarial Frontier: Quantifying Robustness via Adversarial Hypervolume. CoRR abs/2403.05100 (2024) - 2020
- [j4]Shang Li, Zhiyuan Yang, Dhiraj Reddy, Ankur Srivastava, Bruce L. Jacob:
DRAMsim3: A Cycle-Accurate, Thermal-Capable DRAM Simulator. IEEE Comput. Archit. Lett. 19(2): 110-113 (2020)
2010 – 2019
- 2019
- [j3]Zhiyuan Yang, Caleb Serafy, Tiantao Lu, Ankur Srivastava:
Enhanced Phase-Driven Q-Learning-Based DRM for Multicore Processors. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 38(11): 2022-2031 (2019) - 2018
- [c9]Zhiyuan Yang, Ankur Srivastava:
Value-driven Synthesis for Neural Network ASICs. ISLPED 2018: 1:1-1:6 - [c8]Zhiyuan Yang, Michael Zuzak, Ankur Srivastava:
HMCTherm: a cycle-accurate HMC simulator integrated with detailed power and thermal simulation. MEMSYS 2018: 209-117 - 2017
- [j2]Tiantao Lu, Caleb Serafy, Zhiyuan Yang, Sandeep Kumar Samal, Sung Kyu Lim, Ankur Srivastava:
TSV-Based 3-D ICs: Design Methods and Tools. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 36(10): 1593-1619 (2017) - [c7]Zhiyuan Yang, Caleb Serafy, Tiantao Lu, Ankur Srivastava:
Phase-driven Learning-based Dynamic Reliability Management For Multi-core Processors. DAC 2017: 46:1-46:6 - [c6]Caleb Serafy, Zhiyuan Yang, Ankur Srivastava:
Design Space Modeling and Simulation for Physically Constrained 3D CPUs. ACM Great Lakes Symposium on VLSI 2017: 375-380 - 2016
- [j1]Caleb Serafy, Zhiyuan Yang, Ankur Srivastava, Yuanchen Hu, Yogendra Joshi:
Thermoelectric Codesign of 3-D CPUs and Embedded Microfluidic Pin-Fin Heatsinks. IEEE Des. Test 33(2): 40-48 (2016) - [c5]Zhiyuan Yang, Caleb Serafy, Ankur Srivastava:
ECO Based Placement and Routing Framework for 3D FPGAs with Micro-fluidic Cooling. FCCM 2016: 199 - [c4]Zhiyuan Yang, Ankur Srivastava:
Physical Design of 3D FPGAs Embedded with Micro-channel-based Fluidic Cooling. FPGA 2016: 54-63 - [c3]Tiantao Lu, Caleb Serafy, Zhiyuan Yang, Ankur Srivastava:
Voltage Noise Induced DRAM Soft Error Reduction Technique for 3D-CPUs. ISLPED 2016: 82-87 - [c2]Tiantao Lu, Zhiyuan Yang, Ankur Srivastava:
Electromigration-aware placement for 3D-ICs. ISQED 2016: 35-40 - [c1]Tiantao Lu, Zhiyuan Yang, Ankur Srivastava:
Post-Placement Optimization for Thermal-Induced Mechanical Stress Reduction. ISVLSI 2016: 158-163
Coauthor Index
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last updated on 2024-12-15 02:18 CET by the dblp team
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