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ORCIDEmrah Acar
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2010 – 2019
- 2013
[c22]Rajiv V. Joshi, Rouwaida Kanj, S. Butt, Emrah Acar, Dallas Lea
, D. Sciacca:
Hardware-corroborated Variability-Aware SRAM Methodology. VLSI Design 2013: 344-349- 2012
- [c21]Wangyang Zhang, Karthik Balakrishnan, Xin Li, Duane S. Boning, Emrah Acar, Frank Liu, Rob A. Rutenbar:
Spatial variation decomposition via sparse regression. ICICDT 2012: 1-4 - [c20]Amith Singhee, Emrah Acar, Mohammad Imran Younus, Rama N. Singh, Aditya Bansal:
DRC-free high density layout exploration with layout morphing and patterning quality assessment, with application to SRAM. ISQED 2012: 470-476 - 2011
- [j5]Wangyang Zhang, Xin Li, Frank Liu, Emrah Acar, Rob A. Rutenbar, Ronald D. Blanton:
Virtual Probe: A Statistical Framework for Low-Cost Silicon Characterization of Nanoscale Integrated Circuits. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 30(12): 1814-1827 (2011) - [c19]Hans M. Jacobson, Alper Buyuktosunoglu, Pradip Bose, Emrah Acar, Richard J. Eickemeyer:
Abstraction and microarchitecture scaling in early-stage power modeling. HPCA 2011: 394-405 - 2010
- [c18]Wangyang Zhang, Xin Li, Emrah Acar, Frank Liu, Rob A. Rutenbar:
Multi-Wafer Virtual Probe: Minimum-cost variation characterization by exploring wafer-to-wafer correlation. ICCAD 2010: 47-54
2000 – 2009
- 2009
- [c17]Aditya Bansal, Rama N. Singh, Rouwaida Kanj, Saibal Mukhopadhyay, Jin-Fuw Lee, Emrah Acar, Amith Singhee, Keunwoo Kim, Ching-Te Chuang, Sani R. Nassif, Fook-Luen Heng, Koushik K. Das:
Yield estimation of SRAM circuits using "Virtual SRAM Fab". ICCAD 2009: 631-636 - 2007
- [j4]Haifeng Qian, Emrah Acar:
Timing-Aware Power Minimization via Extended Timing Graph Methods. J. Low Power Electron. 3(3): 318-326 (2007) - [j3]Peng Li, Zhuo Feng, Emrah Acar:
Characterizing Multistage Nonlinear Drivers and Variability for Accurate Timing and Noise Analysis. IEEE Trans. Very Large Scale Integr. Syst. 15(11): 1205-1214 (2007) - [c16]Reinaldo A. Bergamaschi, Indira Nair, Gero Dittmann, Hiren D. Patel, Geert Janssen, Nagu R. Dhanwada, Alper Buyuktosunoglu, Emrah Acar, Gi-Joon Nam, Dorothy Kucar, Pradip Bose, John A. Darringer, Guoling Han:
Performance modeling for early analysis of multi-core systems. CODES+ISSS 2007: 209-214 - 2006
- [c15]Emrah Acar, Kanak Agarwal, Sani R. Nassif:
Characterization of total chip leakage using inverse (reciprocal) gamma distribution. ISCAS 2006 - [c14]Emrah Acar, Peter Feldmann:
Simulation of SOI transistor circuits through non-equilibrium initial condition analysis (NEICA). ISCAS 2006 - [c13]Sani R. Nassif, Kanak Agarwal, Emrah Acar:
Methods for estimating decoupling capacitance of nonswitching circuit blocks. ISCAS 2006 - 2005
- [j2]Emrah Acar, Anirudh Devgan, Sani R. Nassif:
Leakage and Leakage Sensitivity Computation for Combinational Circuits. J. Low Power Electron. 1(2): 172-181 (2005) - [c12]Peng Li, Emrah Acar:
A Waveform Independent Gate Model for Accurate Timing Analysis. ICCD 2005: 363-365 - 2003
- [c11]Emrah Acar, Ravishankar Arunachalam, Sani R. Nassif:
Predicting short circuit power from timing models. ASP-DAC 2003: 277-282 - [c10]Haihua Su, Emrah Acar, Sani R. Nassif:
Power grid reduction based on algebraic multigrid principles. DAC 2003: 109-112 - [c9]Haihua Su, Frank Liu, Anirudh Devgan, Emrah Acar, Sani R. Nassif:
Full chip leakage estimation considering power supply and temperature variations. ISLPED 2003: 78-83 - [c8]Emrah Acar, Anirudh Devgan, Rahul M. Rao, Ying Liu, Haihua Su, Sani R. Nassif, Jeffrey L. Burns:
Leakage and leakage sensitivity computation for combinational circuits. ISLPED 2003: 96-99 - [c7]Ravishankar Arunachalam, Emrah Acar, Sani R. Nassif:
Optimal shielding/spacing metrics for low power design. ISVLSI 2003: 167-172 - 2002
- [j1]Emrah Acar, Florentin Dartu, Lawrence T. Pileggi:
TETA: transistor-level waveform evaluation for timing analysis. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 21(5): 605-616 (2002) - [c6]Emrah Acar, Sani R. Nassif, Lawrence T. Pileggi:
A Linear-Centric Simulation Framework for Parametric Fluctuations. DATE 2002: 568-575 - [c5]Emrah Acar, Sani R. Nassif, Ying Liu, Lawrence T. Pileggi:
Time-Domain Simulation of Variational Interconnect Models. ISQED 2002: 419-424 - 2001
- [c4]Emrah Acar, Lawrence T. Pileggi, Sani R. Nassif, Ying Liu:
Assessment of True Worst Case Circuit Performance Under Interconnect Parameter Variations. ISQED 2001: 431-436
1990 – 1999
- 1999
- [c3]Emrah Acar, Altan Odabasioglu, Mustafa Celik, Lawrence T. Pileggi:
S2P: A Stable 2-Pole RC Delay and Coupling Noise Metric. Great Lakes Symposium on VLSI 1999: 60-63 - 1998
- [c2]Emrah Acar, Orhan Arikan:
Regressor based adaptive infinite impulse response filtering. ICASSP 1998: 1733-1736 - [c1]Tao Lin, Emrah Acar, Lawrence T. Pileggi:
h-gamma: an RC delay metric based on a gamma distribution approximation of the homogeneous response. ICCAD 1998: 19-25
Coauthor Index
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