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ORCIDSiPS 2017: Lorient, France
- 2017 IEEE International Workshop on Signal Processing Systems, SiPS 2017, Lorient, France, October 3-5, 2017. IEEE 2017, ISBN 978-1-5386-0446-5
- Musab Ghadi, Lamri Laouamer, Laurent Nana, Anca Pascu:
A joint spatial texture analysis/watermarking system for digital image authentication. 1-6 - Mao-Ruei Li, Li-Min Jhuang, Yeong-Luh Ueng
:
A modified gradient descent bit flipping decoding scheme for LDPC codes. 1-6 - Waseem Abbas, Nadeem Ahmad Khan:
A discriminative spectral-temporal feature set for motor imagery classification. 1-6 - Shingo Noami, Satoshi Saikatsu, Akira Yasuda:
A reduction of circuit size of digital direct-driven speaker architecture using segmented pulse shaping technique. 1-6 - Jiejun Jin, Ye Xue, Yeong-Luh Ueng, Xiaohu You, Chuan Zhang:
A split pre-conditioned conjugate gradient method for massive MIMO detection. 1-6 - Paulo Martins, Leonel Sousa:
A stochastic number representation for fully homomorphic cryptography. 1-6 - Stefan Weithoffer, Matthias Herrmann, Claus Kestel, Norbert Wehn:
Advanced wireless digital baseband signal processing beyond 100 Gbit/s. 1-6 - Yufeng Yang, Ye Xue, Xiaohu You, Chuan Zhang:
An efficient conjugate residual detector for massive MIMO systems. 1-6 - Fraser K. Coutts, Keith Thompson, Stephan Weiss, Ian K. Proudler:
Analysing the performance of divide-and-conquer sequential matrix diagonalisation for large broadband sensor arrays. 1-6 - Pascal Giard, Alexios Balatsoukas-Stimming, Andreas Burg:
Blind detection of polar codes. 1-6 - Ghouthi Boukli Hacene, Vincent Gripon, Nicolas Farrugia, Matthieu Arzel, Michel Jézéquel:
Budget restricted incremental learning with pre-trained convolutional neural networks and binary associative memories. 1-6 - Zhiwei Zhong, Lulu Ge, Ziyuan Shen, Xiaohu You, Chuan Zhang:
CRN-based design methodology for synchronous sequential logic. 1-6 - Benjamin Barrois, Olivier Sentieys:
Customizing fixed-point and floating-point arithmetic - A case study in K-means clustering. 1-6 - Reza Ghanaatian, Andreas Burg:
DVFS based power management for LDPC decoders with early termination. 1-6 - Simone Casale Brunet, Endri Bezati, Marco Mattavelli:
Design space exploration of dataflow-based Smith-Waterman FPGA implementations. 1-6 - Muhammad Zeeshan Waheed, Dani Korpi, Adnan Qamar Kiayani, Lauri Anttila, Mikko Valkama:
Digital self-interference cancellation in inter-band carrier aggregation transceivers: Algorithm and digital implementation perspectives. 1-5 - Xiao Chen, Jingmin Xin, Nanning Zheng, Akira Sano:
Direction-of-arrival estimation of coherent narrowband signals with arbitrary linear array. 1-5 - Chen-Jung Wu, Ching-Te Chiu:
Dry fingerprint detection for multiple image resolutions using ridge features. 1-5 - Hugues Wouafo, Cyrille Chavet, Philippe Coussy, Robin Danilo:
Efficient scalable hardware architecture for highly performant encoded neural networks. 1-6 - Carlo Condo, Seyyed Ali Hashemi, Warren J. Gross:
Efficient bit-channel reliability computation for multi-mode polar code encoders and decoders. 1-6 - Zhizhen Wu, Lulu Ge, Xiaohu You, Chuan Zhang:
Efficient near-MMSE detector for large-scale MIMO systems. 1-6 - Tzu-Hao Tai, Hsin-Jung Chen, Wei-Ho Chung, Ta-Sung Lee:
Energy efficient norm-and-correlation-based antenna selection algorithm in spatially correlated massive multi-user MIMO systems. 1-5 - Issa Qiqieh, Rishad A. Shafik, Ghaith Tarawneh, Danil Sokolov, Shidhartha Das, Alex Yakovlev:
Energy-efficient approximate wallace-tree multiplier using significance-driven logic compression. 1-6 - Thibault Hilaire, Anastasia Volkova:
Error analysis methods for the fixed-point implementation of linear systems. 1-6 - Cédric Marchand, Emmanuel Boutillon, Hassan Harb, Laura Conde-Canencia, Ali Al Ghouwayel:
Extended-forward architecture for simplified check node processing in NB-LDPC decoders. 1-6 - Yuri Nishizumi, Go Matsukawa, Koichi Kajihara, Taisuke Kodama, Shintaro Izumi, Hiroshi Kawaguchi, Chikako Nakanishi, Toshio Goto, Takeo Kato, Masahiko Yoshimoto:
FPGA implementation of object recognition processor for HDTV resolution video using sparse FIND feature. 1-6 - Chun-An Chen, Chiao-En Chen, Yuan-Hao Huang:
Forward-substitution-based generalized eigenvalue decomposition processor for MU-MIMO precoding. 1-6 - Mohamed Mourad Hafidhi, Emmanuel Boutillon:
Hardware error correction using local syndromes. 1-6 - Junhee Cho, Wonyong Sung:
High-throughput decoding of block turbo codes on graphics processing units. 1-6 - Weihong Xu, Zhizhen Wu, Yeong-Luh Ueng, Xiaohu You, Chuan Zhang:
Improved polar decoder based on deep learning. 1-6 - Liang He, Xianhong Chen, Can Xu, Tianyu Liang, Jia Liu:
Ivec-PLDA-AHC priors for VB-HMM speaker diarization system. 1-6 - Panu Sjovall, Vili Viitamäki, Arto Oinonen, Jarno Vanne, Timo D. Hämäläinen, Ari Kulmala:
Kvazaar 4K HEVC intra encoder on FPGA accelerated airframe server. 1-6 - Swati Bhardwaj, Shashank Raghuraman, Amit Acharyya:
Low complexity hardware accelerator for nD FastICA based on coordinate rotation. 1-6 - Bertrand Le Gal, Christophe Jégo:
Low-latency software LDPC decoders for x86 multi-core devices. 1-6 - Jani Boutellier, Shuvra S. Bhattacharyya:
Low-power heterogeneous computing via adaptive execution of dataflow actors. 1-6 - Jiahao Wu, Timothy Blattner, Walid Keyrouz, Shuvra S. Bhattacharyya:
Model-based dynamic scheduling for multicore implementation of image processing systems. 1-6 - Jorge Oliveira, Theofrastos Mantadelis, Francesco Renna, Pedro Gomes, Miguel Tavares Coimbra:
On modifying the temporal modeling of HSMMs for pediatric heart sound segmentation. 1-6 - Cory Stephenson, Patrick Callier, Abhinav Ganesh, Karl Ni:
Monaural speaker separation using source-contrastive estimation. 1-6 - Takaaki Okano, Shintaro Izumi, Takumi Katsuura, Hiroshi Kawaguchi, Masahiko Yoshimoto:
Multimodal cardiovascular information monitor using piezoelectric transducers for wearable healthcare. 1-6 - Fahad Qureshi, Muazam Ali, Jarmo Takala:
Multiplierless reconfigurable processing element for mixed radix-2/3/4/5 FFTs. 1-6 - Mikko Parviainen, Pasi Pertilä:
Obtaining an optimal set of head-related transfer functions with a small amount of measurements. 1-5 - Maurizio Masera, Maurizio Martina, Guido Masera:
Odd type DCT/DST for video coding: Relationships and low-complexity implementations. 1-6 - Yonghong Bai, Zhiyuan Yan:
Physical unclonable functions with improved robustness based on polar codes. 1-6 - Yu Gong, Tingting Xu, Bo Liu, Wei Ge, Jinjiang Yang, Jun Yang, Longxing Shi:
Processing LSTM in memory using hybrid network expansion model. 1-6 - Hayfa Ben Thameur, Bertrand Le Gal, Nadia Khouja, Fethi Tlili, Christophe Jégo:
Reduced complexity ADMM-based schedules for LP decoding of LDPC convolutional codes. 1-6 - Said Medjkouh, Jérémy Nadal, Charbel Abdel Nour, Amer Baghdadi:
Reduced complexity FPGA implementation for UF-OFDM frequency domain transmitter. 1-6 - Furkan Ercan, Carlo Condo, Warren J. Gross:
Reduced-memory high-throughput fast-SSC polar code decoder architecture. 1-6 - Chieh-Fang Teng, Ching-Chun Liao, Hung-Yi Cheng, An-Yeu Andy Wu:
Reliable compressive sensing (CS)-based multi-user detection with power-based Zadoff-Chu sequence design. 1-5 - Meng-Ya Tsai, Ching-Yao Chou, An-Yeu Andy Wu:
Robust compressed analysis using subspace-based dictionary for ECG telemonitoring systems. 1-5 - Filipa dos Santos, Peter Andras, D. J. Collins, K. P. Lam:
A robust data-driven approach to the decoding of pyloric neuron activity. 1-6 - Andrey Ivanov, Dmitry Lakontsev:
Selective tone reservation for PAPR reduction in wireless communication systems. 1-6 - Thomas Richter, Nils Genser, Jürgen Seiler, André Kaup, Christopher Saloman, Koray Kasnakli, Arne Nowak, Michael Schöberl:
Sequential polarization imaging using multi-view fusion. 1-5 - Anas Jallouli, Fatma Belghith, Mohamed Ali Ben Ayed, Wassim Hamidouche, Jean-François Nezan, Nouri Masmoudi:
Statistical analysis of Post-HEVC encoded videos. 1-6 - Yoonho Boo, Wonyong Sung:
Structured sparse ternary weight coding of deep neural networks for efficient hardware implementations. 1-6 - Bertrand Le Gal, Camille Leroux, Christophe Jégo:
Successive cancellation decoder for very long polar codes. 1-6 - Georgios Georgakarakos, Sudeep Kanur, Johan Lilius, Karol Desnos:
Task-based execution of synchronous dataflow graphs for scalable multicore computing. 1-6 - Jose Marques, João Andrade, Gabriel Falcão:
Unreliable memory operation on a convolutional neural network processor. 1-6 - Alexandre Mercat, Florian Arrestier, Maxime Pelcat, Wassim Hamidouche, Daniel Ménard:
Prediction of quad-tree partitioning for budgeted energy HEVC encoding. 1-6
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last updated on 2024-11-21 20:34 CET by the dblp team
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