• case-insensitive prefix search: default
  e.g., sig matches "SIGIR" as well as "signal"
• exact word search: append dollar sign ($) to word
  e.g., graph$ matches "graph", but not "graphics"
• boolean and: separate words by space
  e.g., codd model
• boolean or: connect words by pipe symbol (|)
  e.g., graph|network

Update May 7, 2017: Please note that we had to disable the phrase search operator (.) and the boolean not operator (-) due to technical problems. For the time being, phrase search queries will yield regular prefix search result, and search terms preceded by a minus will be interpreted as regular (positive) search terms.

found 25 matches

• 1995
• 
  Vaughn Betz, Jonathan Rose:
  Using Architectural "Families" to Increase FPGA Speed and Density. FPGA 1995: 10-16
• 
  Pak K. Chan, Martine D. F. Schlag, Jason Y. Zien:
  Spectral-Based Multi-Way FPGA Partitioning. FPGA 1995: 133-139
• 
  Paul Chow, P. Glenn Gulak:
  A Field-Programmable Mixed-Analog-Digital Array. FPGA 1995: 104-109
• 
  Jason Cong, Yuzheng Ding:
  On Nominal Delay Minimization in LUT-based FPGA Technology Mapping. FPGA 1995: 82-88
• 
  Jason Cong, Yean-Yow Hwang:
  Simultaneous Depth and Area Minimization in LUT-based FPGA Mapping. FPGA 1995: 68-74
• 
  Baher Haroun, Behzad Sajjadi:
  Synthesis of Signal Processing Structured Datapaths for FPGAs Supporting RAMs and Busses. FPGA 1995: 75-81
• 
  Scott Hauck, Gaetano Borriello:
  Logic Partition Orderings for Multi-FPGA Systems. FPGA 1995: 32-38
• 
  Dennis J.-H. Huang, Andrew B. Kahng:
  Multi-way System Partitioning into a Single Type or Multiple Types of FPGAs. FPGA 1995: 140-145
• 
  Tsuyoshi Isshiki, Wayne Wei-Ming Dai:
  High-Level Bit-Serial Datapath Synthesis for Multi-FPGA Systems. FPGA 1995: 167-173
• 
  Tong Liu, Wei-Kang Huang, Fabrizio Lombardi:
  Testing of Uncustomized Segmented Channel Field Programmable Gate Arrays. FPGA 1995: 125-131
• 
  Vijayshri Maheshwari, Joel Darnauer, John Ramirez, Wayne Wei-Ming Dai:
  Design of FPGAs with Area I/O for Field Programmable MCM. FPGA 1995: 17-23
• 
  Anmol Mathur, Kuang-Chien Chen, C. L. Liu:
  Applications of Slack Neighborhood Graphs to Timing Driven Optimization Problems in FPGAs. FPGA 1995: 118-124
• 
  Larry McMurchie, Carl Ebeling:
  PathFinder: A Negotiation-based Performance-driven Router for FPGAs. FPGA 1995: 111-117
• 
  Laurent Moll, Jean Vuillemin, Philippe Boucard:
  High-Energy Physics on DECPeRLe-1 Programmable Active Memory. FPGA 1995: 47-52
• 
  Koray Öner, Luiz André Barroso, Sasan Iman, Jaeheon Jeong, Krishnan Ramamurthy, Michel Dubois:
  The Design of RPM: An FPGA-based Multiprocessor Emulator. FPGA 1995: 60-66
• 
  H. Pottinger, W. Eatherton, J. Kelly, T. Schiefelbein, L. R. Mullin, R. Ziegler:
  Hardware Assists for High Performance Computing Using a Mathematics of Arrays. FPGA 1995: 39-45
• 
  Kalapi Roy-Neogi, Carl Sechen:
  Multiple FPGA Partitioning with Performance Optimization. FPGA 1995: 146-152
• 
  Brian Schoner, John D. Villasenor, Steve Molloy, Rajeev Jain:
  Techniques for FPGA Implementation of Video Compression Systems. FPGA 1995: 154-159
• 
  Stephen D. Scott, Ashok Samal, Sharad C. Seth:
  HGA: A Hardware-Based Genetic Algorithm. FPGA 1995: 53-59
• 
  Charles Selvidge, Anant Agarwal, Matthew Dahl, Jonathan Babb:
  TIERS: Topology Independent Pipelined Routing and Scheduling for VirtualWire Compilation. FPGA 1995: 25-31
• 
  Shashidhar Thakur, D. F. Wong:
  On Designing ULM-based FPGA Logic Modules. FPGA 1995: 3-9
• 
  Steven J. E. Wilton, Jonathan Rose, Zvonko G. Vranesic:
  Architecture of Centralized Field-Configurable Memory. FPGA 1995: 97-103
• 
  Nam Sung Woo:
  Revisiting the Cascade Circuit in Logic Cells of Lookup Table Based FPGAs. FPGA 1995: 90-96
• 
  H. A. Xie, Kevin E. Forward, K. M. Adams, D. Leask:
  An SBus Monitor Board. FPGA 1995: 160-166
• 
  Pak K. Chan, Jonathan Rose:
  Proceedings of the Third International ACM Symposium on Field-Programmable Gate Arrays,FPGA 1995, Monterey, California, USA, February 12-14, 1995. ACM 1995, ISBN 0-89791-743-X [contents]