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Publication search results
found 38 matches
- 2002
- Ahmet Akkas:
A Combined Interval and Floating-Point Comparator/Selector. ASAP 2002: 208-217 - Mehboob Alam
, Wael M. Badawy
, Graham A. Jullien:
A Novel Pipelined Threads Architecture for AES Encryption Algorithm. ASAP 2002: 296-302 - Elisardo Antelo
, Tomás Lang, Paolo Montuschi, Alberto Nannarelli
:
Fast Radix-4 Retimed Division with Selection by Comparisons. ASAP 2002: 185-196 - Mark G. Arnold:
Reduced Power Consumption for MPEG Decoding with LNS. ASAP 2002: 65-75 - Guido Bertoni
, Luca Breveglieri, Israel Koren, Paolo Maistri, Vincenzo Piuri:
On the Propagation of Faults and Their Detection in a Hardware Implementation of the Advanced Encryption Standard. ASAP 2002: 303- - Holger Blume
, H. Hübert, H. T. Feldkämper, Tobias G. Noll:
Model-Based Exploration of the Design Space for Heterogeneous Systems on Chip. ASAP 2002: 29-40 - Neil Burgess:
PAPA - Packed Arithmetic on a Prefix Adder for Multimedia Applications. ASAP 2002: 197-207 - David Cachera, Tanguy Risset:
Advances in Bit Width Selection Methodology. ASAP 2002: 381-390 - Roger D. Chamberlain, Mark A. Franklin, Praveen Krishnamurthy:
Optical Network Reconfiguration for Signal Processing Applications. ASAP 2002: 344- - E. I. Chester, John N. Coleman:
Matrix Engine for Signal Processing Applications Using the Logarithmic Number System. ASAP 2002: 315-324 - Chris Y. Chung, Ravi Managuli, Yongmin Kim:
Design and Evaluation of a Multimedia Computing Architecture Based on a 3D Graphics Pipeline. ASAP 2002: 243-252 - Steven M. Currie, Paul R. Schumacher, Barry K. Gilbert, Earl E. Swartzlander Jr., Barbara A. Randall:
Implementation of a Single Chip, Pipelined, Complex, One-Dimensional Fast FourierTransform in 0.25 mu m BulkCMOS. ASAP 2002: 335-343 - Alain Darte, Guillaume Huard:
New Results on Array Contraction. ASAP 2002: 359-370 - Michael D. DeVore, Roger D. Chamberlain, George Engel, Joseph A. O'Sullivan
, Mark A. Franklin:
Tradeoffs Between Quality of Results and Resource Consumption in a Recognition System. ASAP 2002: 391- - Jeffrey T. Draper, Jeff Sondeen, Sumit D. Mediratta, Ihn Kim:
Implementation of a 32-bit RISC Processor for the Data-Intensive Architecture Processing-In-Memory Chip. ASAP 2002: 163-172 - José A. B. Fortes:
Nanocomputing with Delays. ASAP 2002: 3- - Afzal Hossain, Daniel J. Pease, James S. Burns, Nasima Parveen:
A Mathematical Model of Trace Cache. ASAP 2002: 151-162 - James Irwin, David May, Henk L. Muller, Dan Page:
Predictable Instruction Caching for Media Processors. ASAP 2002: 141-150 - James Irwin, Dan Page, Nigel P. Smart:
Instruction Stream Mutation for Non-Deterministic Processors. ASAP 2002: 286-295 - Chang Yong Kang, Earl E. Swartzlander Jr.:
An Analysis of the CORDIC Algorithm for Direct Digital Frequency Synthesis. ASAP 2002: 111-119 - Peter Kornerup:
Reviewing 4-to-2 Adders for Multi-Operand Addition. ASAP 2002: 218- - Ruby B. Lee, A. Murat Fiskiran, Zhijie Shi, Xiao Yang:
Refining Instruction Set Architecture for High-Performance Multimedia Processing in Constrained Environments. ASAP 2002: 253-264 - Byeong Kil Lee, Lizy Kurian John:
Implications of Programmable General Purpose Processors for Compression/Encryption Applications. ASAP 2002: 233-242 - Tsai-Yun Liao, Ta-Yin Hu
:
A CORBA-Based GIS-T for Ambulance Assignment. ASAP 2002: 371-380 - Chih-Chung Lu, Shau-Yin Tseng:
Integrated Design of AES (Advanced Encryption Standard) Encrypter and Decrypter. ASAP 2002: 277-285 - Manju Manjunathaiah, Graham M. Megson:
Compositional Technique for Synthesising Multi-Phase Regular Arrays. ASAP 2002: 7-16 - David W. Matula, Alex Fit-Florea, Lee D. McFearin:
Evaluating Products of Non Linear Functions by Indirect Bipartite Table Lookup. ASAP 2002: 120-129 - Sumit Mohanty, Seonil Choi, Ju-wook Jang, Viktor K. Prasanna:
A Model-Based Methodology for Application Specific Energy Efficient Data Path Design Using FPGAs. ASAP 2002: 76-87 - Roberto Muscedere, Vassil S. Dimitrov, Graham A. Jullien, William C. Miller:
Efficient Conversion From Binary to Multi-Digit Multi-Dimensional Logarithmic Number Systems Using Arrays of Range Addressable Look-Up Tables. ASAP 2002: 130- - Woo-Chan Park, Kil-Whan Lee, Il-San Kim, Tack-Don Han, Sung-Bong Yang:
A Mid-Texturing Pixel Rasterization Pipeline Architecture for 3D Rendering Processors. ASAP 2002: 173-
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