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ORCIDAdarsha Rao
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2010 – 2019
- 2011
[c5]Adarsha Rao, S. K. Nandy, Hristo Nikolov, Ed F. Deprettere:
USHA: Unified software and hardware architecture for video decoding. SASP 2011: 30-37- 2010
- [c4]Adarsha Rao, Pramod P. Udupa
:
A hardware accelerated system for deep packet inspection. MEMOCODE 2010: 89-92
2000 – 2009
- 2009
- [j1]Mythri Alle, Keshavan Varadarajan, Alexander Fell, C. Ramesh Reddy, Joseph Nimmy, Saptarsi Das, Prasenjit Biswas, Jugantor Chetia, Adarsha Rao, S. K. Nandy, Ranjani Narayan:
REDEFINE: Runtime reconfigurable polymorphic ASIC. ACM Trans. Embed. Comput. Syst. 9(2): 11:1-11:48 (2009) - [c3]Adarsha Rao, Mythri Alle, Sainath V, Reyaz Shaik, Rajashekhar Chowhan, Sreeramula Sankaraiah, Sravanthi Mantha, S. K. Nandy, Ranjani Narayan:
An Input Triggered Polymorphic ASIC for H.264 Decoding. ASAP 2009: 106-113 - 2008
- [c2]Mythri Alle, Keshavan Varadarajan, Ramesh C. Ramesh, Joseph Nimmy, Alexander Fell, Adarsha Rao, S. K. Nandy, Ranjani Narayan:
Synthesis of application accelerators on Runtime Reconfigurable Hardware. ASAP 2008: 13-18 - [c1]Adarsha Rao, Mythri Alle, S. K. Nandy, Ranjani Narayan:
Architecture of a polymorphic ASIC for interoperability across multi-mode H.264 decoders. ASAP 2008: 287-292
Coauthor Index
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