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Jugantor Chetia

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2020 – today

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2021
[c3]
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  - conf/itc/SuparjoCS21
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Bambang Suparjo, Jugantor Chetia, Ankit R. Shah:
Seamless Physical Implementation of ASIC Hierarchical Integrated Scan Architecture. ITC 2021: 339-343

2000 – 2009

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2009
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  - journals/tecs/AlleVFRNDBCRNN09
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Mythri Alle, Keshavan Varadarajan, Alexander Fell, C. Ramesh Reddy, Joseph Nimmy, Saptarsi Das, Prasenjit Biswas, Jugantor Chetia, Adarsha Rao, S. K. Nandy, Ranjani Narayan:
REDEFINE: Runtime reconfigurable polymorphic ASIC. ACM Trans. Embed. Comput. Syst. 9(2): 11:1-11:48 (2009)
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  - conf/cases/FellAVBDCNN09
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Alexander Fell, Mythri Alle, Keshavan Varadarajan, Prasenjit Biswas, Saptarsi Das, Jugantor Chetia, S. K. Nandy, Ranjani Narayan:
Streaming FFT on REDEFINE-v2: an application-architecture design space exploration. CASES 2009: 127-136
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Alexander Fell, Prasenjit Biswas, Jugantor Chetia, S. K. Nandy, Ranjani Narayan:
Generic routing rules and a scalable access enhancement for the Network-on-Chip RECONNECT. SoCC 2009: 251-254

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