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Chung-Ting Lu

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2020 – today

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2021
[j2]
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  - journals/tcasI/LiYLCLTHLLKXS21
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Chao-Chieh Li, Min-Shueh Yuan, Chia-Chun Liao, Chih-Hsien Chang, Yu-Tso Lin, Tsung-Hsien Tsai, Tien-Chien Huang, Hsien-Yuan Liao, Chung-Ting Lu, Hung-Yi Kuo, Augusto Ronchini Ximenes, Robert Bogdan Staszewski:
A Compact Transformer-Based Fractional-N ADPLL in 10-nm FinFET CMOS. IEEE Trans. Circuits Syst. I Regul. Pap. 68(5): 1881-1891 (2021)

2010 – 2019

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2016
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Chao-Chieh Li, Tsung-Hsien Tsai, Min-Shueh Yuan, Chia-Chun Liao, Chih-Hsien Chang, Tien-Chien Huang, Hsien-Yuan Liao, Chung-Ting Lu, Hung-Yi Kuo, Kenny Hsieh, Mark Chen, Augusto Ronchini Ximenes, Robert Bogdan Staszewski:
A 0.034mm², 725fs RMS jitter, 1.8%/V frequency-pushing, 10.8-19.3GHz transformer-based fractional-N all-digital PLL in 10nm FinFET CMOS. VLSI Circuits 2016: 1-2
2010
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Chung-Ting Lu, Hsieh-Hung Hsieh, Liang-Hung Lu:
A Low-Power Quadrature VCO and Its Application to a 0.6-V 2.4-GHz PLL. IEEE Trans. Circuits Syst. I Regul. Pap. 57-I(4): 793-802 (2010)

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